Week 1101

My last week surprisingly didn’t involve any more hardware and I had opportunity to play again with some good old C. The task for this week was to write the missing software part for the ECDSA, that is the whole algorithm for signature generation and verification (keeping in mind that Read more

15- A new AEMB.

I’ve managed to completely remove the Icache from AEMB. Simulation and FPGA implementation were both a success. However, after the edits AEMB now runs slower because it has to fetch each and every one of it’s instructions through at least two Wishbone cycles. It’s worth mentioning that Before removing the Read more

Week 08 – HTTP2.c Meets SD-SPI.c

Continuing from the last week, the reason that why the connection will be timed out when uploading a larger file is due to the modification I made to calculate the data size uploaded. The method was removed for the mean time and tested the code out. It turns out that Read more

Week 9: Rpi GPIO bit banging

This week has been the shortest one since I started my internship at Aeste because we were having holidays for the Raya Aidilfitri. During the 3 working days of the week, I worked on the GPIO driver to let two raspberry pi communicate with each other. After some discussions with Read more

Week 1100

This week was more general as I was mainly trying to optimize all the modules I did so far, cleaning codes and git. From notable things, I managed to cut the number of LUTs in ECDSA module from last week’s 2200 to 1601 while the number of slice registers went Read more

Week 07 – Minor Modifications

The previous function of reading a sector is using a 512 bytes buffer, by doing minor modifying on the tightest loop to write into a pointer instead of a buffer. The function can read from sector indefinitely (theoretically) using multi-block read. If a read is less than 512 bytes, it Read more

14 – Removing Icache from AEMB

My new task is to remove the Icache module from AEMB. Basically Icache holds all instructions before execution by the core. Icache acquires the instructions from whatever is holding them externally and keeps them for processing. Icache controls the Instructions WB interface through the ich_hit signal. When the processor needs Read more