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Week Six

This is week six of my internship at Aeste Works. After configuring the company’s board to enumerate successfully on a Windows environment, it was time to configure it on Linux. On Windows, the usb drivers loads according to the Vendor ID and Product ID which was for Microchip’s USB CDC Abstract Control Model demo. USB CDC Ethernet Control Model is widely used for interoperability with non-Microsoft operating systems, but does not work with Windows and this meant that even with the Read more…

Connecting Wishbone switches

I continued to work on the Wishbone switch throughout the week. First of all, I added some additional signal ports to the Wishbone switch I created last week. Those additional signals were described as follows, based on the Wishbone specification. MASTER signals SEL_O: It denoted the location of valid data. WE_O: It would be asserted during WRITE cycles and negated during READ cycles. CYC_O: It would be asserted throughout all bus cycles. SLAVE signals SEL_I: It denoted the location of Read more…

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Starting the New Year with a Bang

Hello everyone, and happy 2019. I’m back writing the first blog for the new year and to inform my dear readers, whoever it may be, of the status of my project. Hoping back into the project, the only problem that I have to deal with now is getting the automatic installation of client certificates to work. I had run into some major problems regarding this, as I had outlined in a previous blog. Anyways, looking back into it, nothing good Read more…

A tale of a Wishbone switch

I was working on a Wishbone switch in this week. The switch would be able to pass data to either the downstream or the I/O device from the upstream. To design a Wishbone switch, it was crucial to understand all signals present in Wishbone. I would describe some Wishbone signals below based on the Wishbone specification. DAT_I: It denoted the data input array, the size of the array was determined by the port size DAT_O: It denoted the data input Read more…

Week Five

This is week five of my internship at Aeste Works. To move forward to what I have to do to implement USB CDC ECM class for ethernet over usb, I’d have to first migrate the USB CDC ACM demo from the PIC32MX which I had been working on last week to the PIC32MZ in which the company’s own board utilises. I was provided a schematic showing the pinouts of the custom board and was tasked to implement a simple LED Read more…

A Year in Aeste

I’ve finally implemented the base functionalities of the project, and tested that everything works as expected. The only thing that I have left hanging in the dark is finding out how to get the automatic installation of client certificates into browser working. Nevertheless, the application is almost ready to be deployed soon, even if we have to resort to having the users do manual installation of their certificate in the worst case scenario, once further testing and final checks have Read more…

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Photo by Tim Gouw on Unsplash

Week Four

This is my fourth week as an Intern at Aeste Works. My main target this week was to configure the PIC32MX microcontroller as a Universal Serial Bus Communications Class Device that utilizes the Ethernet Networking Control Model (ECM) in allowing the exchange of Ethernet-framed data between device and host. The first two days of the week were going through Microchip’s USB library documentation and USB Specification for Communication Devices to understand how the USB stack is structured specifically for the PIC32MX.  Read more…

One step closer

Fourth week of internship. As Dr Shawn advised me to modify the repository, I had to study the code carefully so that I could be able to generate a correct top level verilog file for synthesis. To do so, it was crucial to understand std::map, as most of the important information was stored in a map. Std::map was an associative container to store elements, i.e. key-value pairs. A simple example would be std::map<int, int> map, where the map stored key-value Read more…

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‘Tis the season to be jolly

This week is the week where I try to finish up all of the basic functionalities of the application. What I had left was to figure out how to create a custom x509v3 extension with Botan C++. As recommended by Dr Shawn, I used the UserRole extension, as shown here. Creating the UserRole extension with Botan C++ involves having a self-defined class to inherit the properties of Botan’s Certificate_Extension class. Since it is an abstract class, there are some methods Read more…

Week Three

This is week three of my internship at Aeste Works. Three main tasks were assigned to me this week. First was to study on the programming & configuration protocols of three different FPGA’s namely Xilinx’s Spartan-6, Intel’s Cyclone and Lattice’s iCE40. Currently, the company’s own board incorporates the Xilinx Spartan 6 FPGA configured by a PIC32 microcontroller and thus the objective of studying the documentation of the other two were to determine whether or not a different configuration protocol will Read more…

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