Chronicles from our peeps.
This week didn’t start off well, mainly due to the incomplete tasks from last week, which are proving to be pretty troublesome at this point. The biggest issue was due to the meeting with the client being on Monday, and thus presenting them with a project which isn’t functioning properly Read more…
This week Dr. Shawn pointed out that we do not need to use a boot loader since we just need to erase the flash and write the new data. I looked at NVM (Non-Volatile Memory) controller as an alternative. The NVM library in MPLAB X gives you the ability to Read more…
This week the second part of my task, that is to be able to erase the FPGA or PIC32 flash when needed and program them accordingly. Erasing the FPGA means putting it in configuration mode so that in can receive a configuration bitstream. This is achieved by pulling PROGRAM_B pin Read more…
This week I continued on with my task from last week, that being, dealing with the web applications functionality and capabilities. I made quick progress at the start of the week until eventually I started facing trouble with two of the functionalities, from which in both cases the details were Read more…
This week I managed to finish the wolfssl_tcpip code. In the new code, the whole process is carried out in 1 function. In this function, 2 sockets are opened for the 2 possible type of connections; HTTP & HTTPS (with or without SSL). The program then just waits and checks Read more…
My main task for this week was to get the workflow for the web application up and running, and as the title would indicate, that didn’t turn out so well as there were plenty of flaws within my implementation of the required functionalities. I had the workflow sketched out and Read more…
This week I got the wolfssl_tcpip code from Micro-chip running. This code establishes a HTTP server which can then be accessed. My task was to strip away all the extra codes in order to simplify the program. The code is base on Microchip’s code and uses some of the included Read more…
This is my first week as an intern engineer here at Aeste Works. On the first day I was introduced to the project on which I am to work on in full details, once that was covered, I was given a specific task related to the project to work on Read more…
I started the week by generating the BOM and also all the Gerber files needed for manufacturing of the board. Something I learned was if there are any fill areas in the design, it has to be filled before generating the Gerber files. The Gerber files are generated based on Read more…
Routing the board was finished last week. However, the ethernet connection looked really messy and not optimized, Ethernet connections were where I started this PCB design with. Therefore, I rotated the chip and reconnected it again, this time with a lot more care. The connection is now much better. BOM Read more…