Engineering Elegance

Component Placement & Footprints

This week I spend most of my time assigning the footprints to each component and repositioning all the components on the board so that all the newly added digital ports can fit in nicely and be accessible. There are a total of 78 digital pins and 12 analogue pins available on this board. I also encountered an error (“IO_Error: maximum line length exceeded”) this is because the maximum line length should be less than 99 characters and sometimes when an external Read more

By [email protected], ago

Schematics Completed

This week I spent most of my time finishing up the schematics. The updated board will have 2 complete SPI and 1 complete UART connection, between the PIC32 and the FPGA. The PIC32 pin availability for these connections can be checked from harmony configurator in MPLABX. You might need to modify the connection settings in order to see all the different possibilities such as SS pin in an SPI connection and URTS, UCTS pins in a UART connection. Pin Position Read more

By [email protected], ago

Power Supply & Clocking

I started the week by looking at alternative power supply designs. The problem with the current design is that it utilizes 2 bulky linear voltage regulators. There are many single chip solutions for the 3 voltage levels required. However, they are not really cost effective, thus can not be used. The final decision is to use 3 different ICs (MCP1727) in the design. MCP1727 has much higher current rating and also it is considerably smaller in size. Clocking There are Read more

By [email protected], ago

FPGA Migration

This week I managed to replace the FPGA, FTG256 with TQG144. Replacing, or in other word migration between FPGAs with different densities is not very hard as long as they fall under the same family. In this case since they are both Spartan6 XC6S, the pin names and functionalities mostly stays the same. However, the I/O pins are now reduced. The newly replaced FPGA requires different decoupling capacitors for its operation. The value and quantity of the decoupling capacitors required, Read more

By [email protected], ago

Start PCB Design

This week, after some more reading about the board and the connections and also some more reading on PCB design, I started using Kicad. Which is a very powerful PCB design software and it can be used for highly complex projects. After watching a few tutorials online and going through the starter tutorial by Kicad. I started looking at the current design and also an updated version, done by the previous interns. My task is basically to redesign the board, Read more

By [email protected], ago

Third Week

This week which is my third, here at Aeste, was more about reading and understanding the current board. I started the week by redoing the Board Architecture that I worked on last week. At the time I did not fully understand what was asked, so I ended up doing it in a wrong way. The connection lines between components are shown in their respective data sheets, so all I needed to do was find the connections and figure out what Read more

By [email protected], ago

I/O Port & Board Architecture Diagrams

This week I started going through the sample codes and also the previous interns codes and tried to master them. It was hard at the beginning to understand the latest integrated project. However, once I studied the individual parts of the code separately it all started to make sense. In order for me to understand the project properly, I also need to understand it from the hardware point of view as well. Understanding the hardware meant knowing each and every Read more

By [email protected], ago

First week at Aeste

This week, I started my internship with Aeste. The week did not start well for me as I was not able to cover all the pre-internship material that was assigned to me by Dr. Shawn. After being scolded by him on the first day, I had an even bigger task now, not only I had to work on my assignments but also try to show myself to him as well. Dr. Shawn, then gave me an introduction on Git and Read more

By [email protected], ago

MPLAB-X Harmony Tempfile issue

We faced a problem when running MPLAB-X with Harmony framework in a multi-user environment. We didn’t have this problem before this as there was only one person working on the PIC32 code. But we’ve added a new member this week and an issue cropped up. It turned out that the problem was caused by a hard-coding of a temporary directory into the MPLAB-X startup script found in /usr/bin/mplab_ide eval launchexec \ –jdkhome ‘”$jdkhome”‘ \ –clusters ‘”$mplab_ide_clusters”‘ \ -J-Dnetbeans.importclass=org.netbeans.upgrade.AutoUpgrade \ –branding Read more

By Shawn, ago

SDCard Working and Integration

By SD card working as stated in the title, I actually meant that it has only successfully established a connection to the SD card, and is far from being able to write to or read from the SD card. The connection is verified by sending a reset command to the SD card via SPI and reads for a valid response 0x01, this doesn’t make use of the SD card driver in the harmony configurator. If the pic32 reads the correct response Read more

By [email protected], ago