I mainly focused on generating a multipart message this week. I was using curl to send a multipart formpost previously. For example, curl -kv -F ‘lang=vlog’ -F ‘[email protected]’ http://127.0.0.4:8080/api/v19/workspace.elaborate was used to transfer data to a server. The request body was shown below. (Note: A boundary was a string of Read more…
This week I mainly focused on the back-end. In this post I would also like to discuss about some Wt classes since Wt currently lacked community support. First and foremost, I would like to discuss about curl. Since the project did not involve any user interface, I had to use Read more…
This week I was working on designing web APIs. An API was an “application programming interface” and it was needed to exchange information between different parties. The API paradigm that I focused on was Remote Procedure Call (RPC). Previously, the API paradigm used by AESTE was Representational State Transfer (REST). Read more…
I returned to AESTE as an apprentice. In these four weeks, I would continue to work on my previous project. First and foremost, I was advised by Dr Shawn to create a configuration class so that it would be inherited by different FPGAs and a factory method should be implemented. Read more…
This week marked the end of my internship and I was really grateful to have Dr Shawn as my supervisor. I would like to summarise my learning experience over this 12 weeks of internship. Git Git was a version control system to note the progress of software development. Instead of Read more…
In this week I was revising some design patterns to utilise them into the software development. A design pattern was a general solution and it had a high reusability. First and foremost, CPU32 was designed as a singleton. It was instantiated only once and there was a global access to Read more…
This was rather a short week because of the Chinese New Year. Nonetheless, this week I was focusing on modifying AUTO_TEMPLATE for all different modules to generate a top level design. To start off, I was studying the CPU32 module taken from one of the projects and created an AUTO_TEMPLATE Read more…
Time was passing really fast and this was the eighth week of internship. In this week I was working on a Wishbone RAM. To start off, I had to understand the mechanism of a dual port RAM. The dual port RAM fundamentally consisted of an instruction port (read only) and Read more…
In this week I was modifying the Wishbone switch so that it would gave correct signal outputs. To give an overview, the strobe signal from the previous wire must be passed to the next wire after one clock cycle, until it reached the I/O port. As a result, the I/O Read more…
I continued to work on the Wishbone switch throughout the week. First of all, I added some additional signal ports to the Wishbone switch I created last week. Those additional signals were described as follows, based on the Wishbone specification. MASTER signals SEL_O: It denoted the location of valid data. Read more…