SPI Finishing
On my fifth week here, I finished up the SPI that was compatible with the Wishbone bus. I was able to have it working for the four modes of the SCLK. I had to make many changes to the design because I did not have the right idea of the Read more
SPI Slave Modifications
In my fourth week at AESTE, I worked on my spi design. I made many many changes with the help of my mentor. Firstly, I was able to introduce an edge detector that uses two registers on a clk to capture the positive ad the negative edge of the sclk. Read more
Completed GPIO using the Wishbone protocol
In my third week, I worked on designing a GPIO device that uses the wishbone protocol. This project was the same one i was working on last week. I was able to finish my part this week. My gpio basically consists of a direction register and a data register that Read more
Designing a GPIO using the wishbone protocol.
For my second week at AESTE, I was assigned to design and implement a GPIO using the wishbone protocol. The wishbone protocol is a standard method that is used by many processors to communicate to their IO devices. It is a format that uses several several signals in its BUS Read more
First week at AESTE, Kuala Lumpur.
Last week, I was given the opportunity to explore several programs that I needed to use for my upcoming project. These were GIT, Icarus, GTK waveform viewer and finally ISE. I learnt how to store and manipulate files from a repository through GIT. I would recommend GIT to anyone who Read more