Completed GPIO using the Wishbone protocol
In my third week, I worked on designing a GPIO device that uses the wishbone protocol. This project was the same one i was working on last week. I was able to finish my part this week. My gpio basically consists of a direction register and a data register that are connected to a inout wire.
I have several inputs that correspond to the wishbone protocol. These are the data_in, data_out, clk_in, sel_i, we_in, cyc_in and stb_in. the data is either coming into or going to the master device(processor) from the GPIO device. sel_i determines which byte is valid and we determines whether it is a write or read. the cyc_in indicates that there will be transactions taking place between the slave (GPIO) and the master (processor). stb_in indicated that there is a single transaction. It takes two transactions to either to write or to read from the gpio. The first would be to write to the direction register to indicate in which direction the information is flowing (input or an output) and the second transaction is when the data is either sent in or out. the I will post a picture of my design!
This week I will be working on SPI’s! I will tell you more about it later!