Finally work on the AEMB is to be continued after a long unjustified break. In previous posts I have touched a bit on the Instruction Set Architecture (ISA) of AEMB and explained it’s relation with Microblaze ISA. In order to change the threading model of AEMB to coarse grained, I was warned Read more…
Unfortunately I am still behind schedule as I invested my time this week to analyse the flow of handling branches in AEMB. I had to do this because while I understand the big picture behind the new threading model, I still can’t see the details of it.
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Through out last week I started my preparation for changing the threading model for AEMB.
Software wise, I installed ISE on my Ubuntu to be able to compare the area of AEMB before and after the modifications. Here is a couple of tips for you to avoid making small mistakes during the installation. The first one is to run the installation script as root. Second make sure you have the necessary empty space on your drive before attempting the installation.
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Unfortunately this week has been the least productive for me. In this post, I will summarize my small progress for this week. More importantly, as the blog title suggests, I will post images of AEMB design that I drew during my analysis. I hope this can make up for my slow progress.
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The journey of analysing AEMB is finally reaching a destination. In this post I will discuss AEMB’s interface with the data memory and with the accelerator bus. Moreover, I will explain the design of the execution unit and highlight some of it’s parts that I can’t comprehend yet. Finally I Read more…
Dissecting AEMB continues. In this post I will give an overview about the instruction set architecture (ISA) of the AEMB and its register file. Finally I’ll explain how AEMB communicates with the data memory and the accelerator bus. Since AEMB code is compiled using the Microblaze toolchain, the ISA of Read more…
Over the past weeks I’ve been exploring the architecture of microprocessors in general and AEMB’s in particular. I wish I can say I am done with dissecting AEMB but I ain’t. In this blog post I will give a quick overview about my project and give a functional description of Read more…
During the last week, I worked on developing an assembler for ASH1! I have always wondered about the assemblers & compilers design… with AESTE, I had the chance to explore this field. ASH1 assembler is developed using MATLAB. It takes an assembly language source file (text file) and translates it Read more…
After integrating Ethernet operations into ASH1.. I though of demonstrating ASH1 as an IOP .. so I looked for a simple I/O operation, yet a simple one to make my life easy when I am writing the code for it in binary. I decided to make ASH1 works as an Read more…
Cyclic Redundancy Checksums generation and checking were among the challenging things in implementing ASH1. Looking for the accurate way to calculate/check CRCs took me a lot of time as it was confusing in terms of the following: Bit Orientations (LSB first or MSB first). The Initial Value of the CRC Read more…