Threading model for AEMB
Through out last week I started my preparation for changing the threading model for AEMB.
Software wise, I installed ISE on my Ubuntu to be able to compare the area of AEMB before and after the modifications. Here is a couple of tips for you to avoid making small mistakes during the installation. The first one is to run the installation script as root. Second make sure you have the necessary empty space on your drive before attempting the installation.
Shawn gave me some outline regarding the new threading model. First to account for the branch delay mechanism, the threading switch should be swift in the sense that after running one instruction from the new thread, one instruction from the old thread is allowed to run before completely using instructions from the new thread. I still need to further explore the benefits of this scheme.
Another topic that I am considering is how useful is the separate set of registers for each thread under the new model.
Hazards are another area to keep an eye onto when switching threads. In the current AEMB model, there is two kinds of hazards, data hazards and branching hazards. Data hazards occur when the destination of an operation is being used as an operand for the next operations. AEMB handles hazards by forwarding data from the ALU and inserting stalls in cases that require delay.
last but not least, I am quite eager to finish the modifications and start testing the new core. I expect the circuit to be simple but I wish to understand how it affects the processor thoroughly.