This week started with a mess. I started to confuse about what is my task all about, until my supervisor clarified me about it. Add a SPI module As I mentioned on my previous post, my task is to assign the SPI module into the FPGA, to form the communication bridge Read more…
Yay, Oauth feature is working! So previously, I complained that the oauth feature in Wt was not working. It turns out the error was in the redirection endpoint. However, only GoogleService seems to be successful in identifying the user credentials where FacebookService gave a JSON Exception error. This is probably Read more…
Hello everyone, I have agreed to work part-time for Dr. Shawn, together with Alex and Peter. My work will include completing the front end of the previous project which I had contributed on during my last internship. The first task I will try to accomplish is creating a user session, Read more…
After idling from Aeste for a month, I am back to Aeste again. The task now is to continue working on the previous intern project. Since I am working remotely, I have to setup my working environment to be exactly the same in the office. I chose to setup a Read more…
So…….it seems I am back in Aeste 😅😅😅 My task is to continue the part that was done halfway (PCB board). I started the week by first double check my schematic design then match with the PCB design to find any flaw/weird connection. And of course the first week of Read more…
My next task would be to work on making the HTTP to upload the data in data-form instead of file form. I had the text field input integrated with my current HTTP code so I tried to upload a 350KB file with it. It turns out that the upload is Read more…
During the process of trying to write my own MDD stack, I found a comment in the code given by Microchip. It states: //Check if all attempts failed and we timed out. Normally, this won’t happen, //unless maybe the SD card was busy, because it was previously performing a //read Read more…
Field Programmable Gate Array (FPGA) is a type of hardware/logic programmable integrated circuit. It’s flexibility, speed and the increasing number of IP cores make it into a popular solution in embedded system. The selection of the FPGA core is important when designing a FPGA system. FPGA vendors divide their products Read more…
Since the basic function for HAL is able to run without serious problem. I have to put HAL on hold and start to do net layer for AVR32. However, I will come back to HAL when bugs ‘fly’ out or when the time I want to increase the performance of Read more…
Last weekend, I was dealing with the graphic LCD on EVK1105. I am happy to deal with output device. It is because they can interact with users and programmers. They can use for debugging, showing error and feedback. Another reason is the output devices are easier to debug when you Read more…