Engineering Elegance

Week7: PCB Component Placement and Decoupling Capacitors

With the footprints done, wrestling with PCB design continues as usual with component placement and routing. Also this week, I hit a minor snag with regards to simple yet confusing aspect of my task. Blow-by-blow account below, but click here to leap to the summary. Layout & Design Rules As mentioned last week, the end-product will fit the Arduino form factor. The initial schematic had 54 digital I/O pins, but during the laying out of parts on the board a Read more

By kinwailee, ago

15- A new AEMB.

I’ve managed to completely remove the Icache from AEMB. Simulation and FPGA implementation were both a success. However, after the edits AEMB now runs slower because it has to fetch each and every one of it’s instructions through at least two Wishbone cycles. It’s worth mentioning that Before removing the Icache at some points AEMB managed to execute instruction in one clock cycle. Thus I believe there is a big room for improvement even though it won’t be an easy Read more

By [email protected], ago

Week 08 – HTTP2.c Meets SD-SPI.c

Continuing from the last week, the reason that why the connection will be timed out when uploading a larger file is due to the modification I made to calculate the data size uploaded. The method was removed for the mean time and tested the code out. It turns out that the minor modification to the tightest loop is working partially, some data was written into the SD card successfully with some other garbage data. There are two observations that I Read more

By chewjiaxien, ago

Week 5: SHA1 Driver (cont.) & RC4 Driver

This is my fifth week at AESTE, undeniably, I have learned a lot and I think that my programming skills is gradually improving as I implement my tasks. I have spent the first 2 days to continue implementing the SHA1 driver as it was unfinished last week. Later, my program for this driver was tested by a simulator- GTKWave and I found out that there were quite a few of tiny mistakes in my codes. My colleague, Mostafa and I Read more

By pw12796, ago

Week 9: Rpi GPIO bit banging

This week has been the shortest one since I started my internship at Aeste because we were having holidays for the Raya Aidilfitri. During the 3 working days of the week, I worked on the GPIO driver to let two raspberry pi communicate with each other. After some discussions with my supervisor, I decided to make a synchronous bus using the GPIO because it is the easier option. There are several ways of controlling the raspberry pi’s GPIO: wiringpi C Read more

By uyeop, ago

Week 1100

This week was more general as I was mainly trying to optimize all the modules I did so far, cleaning codes and git. From notable things, I managed to cut the number of LUTs in ECDSA module from last week’s 2200 to 1601 while the number of slice registers went up by only 100 from 1200 to 1298. That makes a huge difference! Escpecially that, this can be used to speed up the multiplier 4 times (and basically the whole Read more

By radoslawk, ago

W08-Check run on existing pipeline implementation

This week task is to continue testing on all the instruction set schematics that I have implemented in the pipeline. I need to make sure the correct instruction is fetch according the to the program counter and later decode and execute it according the instruction fetched. Thus, I need to write assembler codes that contains simple arithmetic operation based on the pseudo opcodes for each instruction sets and compile them to hex file format so that I could test run my Read more

By syleong2013, ago

Week 07 – Minor Modifications

The previous function of reading a sector is using a 512 bytes buffer, by doing minor modifying on the tightest loop to write into a pointer instead of a buffer. The function can read from sector indefinitely (theoretically) using multi-block read. If a read is less than 512 bytes, it will perform a single-block read instead. The next modification in the uploading bitstream is a bit tricky. First, the data from the Ethernet can be found in a Special Function Read more

By chewjiaxien, ago

14 – Removing Icache from AEMB

My new task is to remove the Icache module from AEMB. Basically Icache holds all instructions before execution by the core. Icache acquires the instructions from whatever is holding them externally and keeps them for processing. Icache controls the Instructions WB interface through the ich_hit signal. When the processor needs an instruction that’s not available in Icache, the ich_hit signal is driven low which starts a wishbone transaction to fetch the instruction from the external source holding it. Moreover, the Read more

By [email protected], ago

Week6: Finishing Schematics and PCB Footprints

Continuing from where we left off last week, we make a few last-minute additions to the Spartan-6 schematics and design the footprints of the components in preparation for PCB design. Just a short post this week, but click here to skip to the conclusion. Hardware Schematics With all the pins of the PIC18 routed, it was time to do the same for the Spartan-6. With a total of 144 pins, two out of four of the Spartan-6 LX9 banks remained Read more

By kinwailee, ago