Documentation for Project

This week has been spent mainly on documentation of the previous work that had been done. Simplify Code Documenting the code is reminding myself on why do I write it in the way at the first place. Some of the code often comes with unused variable and function where they could be deleted. Thus, I try to clean up most of the code and simplify some code if possible. Also, I helped on documenting those code that has not been Read more…

Getting started with the Project

This week I was assigned for a few tasks. First, I need to study the codebase of the project system to understand how they are related and how they work, especially the simulator part. Honestly, I was having hard time when reading and analyze the codes written by other interns. However, with the help from JeunHo and Khai Yong (seriously thanks a lot!), I was able to understand the system deeper in overall. The next task is, I need to Read more…

Search for System Bugs

This week, I continued with my previous week task, to find the way on how SPI C code actually work with the Verilog module. I stared on the same circuit for hours, but then I still could not find the way to integrate them together. And finally I decide to search in the Internet, finding as many clue as I can. However, then I realized that the SPI module that the previous intern written has only two address that control the data Read more…

First week at Aeste

This is my first week as an intern in Aeste. Currently I am the only intern here along with two part-timers (who are also ex-interns for Aeste). During my first day, I got scolded for not completing the pre-materials. As a result, I was given a week to finish studying all the materials. Besides that, I was also given a brief explanation about the benefits of using Git and the general process of using Git (a powerful source code control Read more…

Analyze the Inferred HDL

This week, I have been working on the GPIO address and the C++ code. Previously, an assumption that had been made for the address of the GPIO registers, which are the control register and data register. However, these assumption can actually be verified through the circuitry of the core itself. Analyze the Core The most direct approach is to draw out the circuitry of the top module that had been inferred. As I drew out the circuitry of the top module, Read more…

PLIB ADC with PIC32 ‘EC’ Family

This week I fix my ADC driver, which I done it incorrectly previously. PIC32MZ come with 2 different Family namely the ‘EC’ family and ‘EF ‘ family. The main difference for both of them would be ‘EC’ only capable of 10bit ADC conversion while ‘EF’ can up to 12bit ADC. For my particular project I will be using ‘EC’ family. ‘EF’ stands for floating point unit, therefore this particular family version is capable of having advance analog feature. After some reading and experiment Read more…

BRAM Size before Synthesis

This week continues with the issue that I had opened previously, which is on the issue that some file is not updated before the synthesis starts. This was a mistake made by the previous intern, that the ramSize (BRAM size) that is needed for synthesis is never been specified correctly on the most updated design. Update the Ram Size for Synthesis Despite knowing the problem, solving it is a big headache, because it involve the alteration on the synthesis flow. Read more…

CodeMirror Code Completion

I finally got an improved version of code completion working. I am glad that there is a working example, which i referred my work on. It was a frustrating process because  there is no explanation on what is actually going on. I spent a great deal of time understanding the whole operation. The solution though, turned  out to be quite simple after all. In the demo example, you would find a few files:- show-hint.js – Just include this directly, it Read more…

SPI ADC with PIC32 Harmony

This week I continue doing emulating ADC based on the proper protocol of SPI ADC from Microchip – MCP3204/3208 From the document table 5-1: state that to initiate a ADC read for specific channel, Master SPI will first send 4bit of ‘Control Bit Selection’ to read the data of the particular ADC channel (Slave SPI). For my application I would need to read from 16 Analog pin, therefore my control bit need to be 8bit to hold an address of ‘0x10’ Read more…

Discover More Bugs

This week  the task is very time consuming, because I spent most of the time debugging and reading the logs in the terminal. As I got to know from my colleague Jeunn Hao, that the simulation still does not work 100% of the time. I decided to read the code and logs all over again, to determine where is the main problem that causes it to be inconsistent. The Inconsistent Emission As I trace the bug, reading the logs again and Read more…