Designing a new PCB Board

This week I finish drawing my PCB design for a new board using Spartan 6 TQFP packaging and PIC32MZ. Also added a bluetooth module (HC-05) onto the new board. In comparison most of the component’s footprint for this new board is exactly the same with the previous board, only this time Read more…

Automate Bitstream: Part 3

Continued from last week, I finally manage to automate the bitstream generation. Good news that I have also fixed the problem that causes the hanging of the web application. The hanging is mainly caused by the usage of Wt::WApplication::instance()->deferRendering, because freezes the user interface. The doJavaScript() Problem What surprised me this Read more…

Code cleanup and adding features

I have been removing a lot of old JSON stuff which is now replaced with Wt::Dbo. So far, using Wt::Dbo has offered so much of convenience when adding, modifying or querying database objects, as long as you create the Wt::Dbo::Session using your database file. insertWidget at specified positions So I Read more…

Automate Bitstream: Part 2

The task continues with more challenges, where I start to monitor the synthesis flow that had been set previously, starting from the generation of the HDL file to the generation of the bitstream. Apparently, I found that most of the process are messed up, where the synthesis actually takes place before Read more…

Extending Wt::Auth

Working on Wt::Auth and Wt::Dbo library for the past few weeks have given me another glimpse into a few of the many functionalities built into Wt. This time it wasn’t as simple as just using the member functions that were provided. The problem with using a library in general is Read more…

Automate Bitstream : Part 1

The Xilinx Synthesis and Implementation As I start to work on the synthesis and implementation flow, in order to generate the final bitstream that is being used to be programmed into the FPGA. I found that several links are very useful for studying the flow of synthesis and implementation. Nevertheless, Read more…

FPGA and PIC comms

This week started with a mess. I started to confuse about what is my task all about, until my supervisor clarified me about it. Add a SPI module As I mentioned on my previous post, my task is to assign the SPI module into the FPGA, to form the communication bridge Read more…