Tagged: xilinx

The importance of Simplicity 0

The importance of Simplicity

This week, I learned to calculate the memory size of Kernel elf file and assign memory blocks accordingly. First, I need to generate an elf file from the C++ source code. Then, by using...

The End of A Journey Does Not Matter, It Is the Journey That Matters, In the End 0

The End of A Journey Does Not Matter, It Is the Journey That Matters, In the End

I started off this week by briefing a new intern that will be taking over my project as this is my last week of internship. I organized so that I can explain everything on...

Automate Bitstream : Part 1 0

Automate Bitstream : Part 1

The Xilinx Synthesis and Implementation As I start to work on the synthesis and implementation flow, in order to generate the final bitstream that is being used to be programmed into the FPGA. I...

The Final Week in AESTE 0

The Final Week in AESTE

This week, the work goes to some optimization of the demosaic core, and some analysis to be done. The Removal of RAM Previously, I had mentioned in my previous blog that, to use RAM...

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Shooting Troubles #3

Continue from the previous blogs, this blog focus on debugging the upcoming errors that may be faced on while using the Zedboard. These errors are the bugs from the Xilinx PlanAhead 14.4, 2012 late version, working...

Hardware Implementation of Demosaicing Algorithm 0

Hardware Implementation of Demosaicing Algorithm

This week I was assigned to draw the schematic for the demosaicing algorithm. The algorithm is separated into two parts, which is bilinear interpolation in the boundary of image, and PPG interpolation for the...

Schematics from Verilog 0

Schematics from Verilog

This week, I had been assigned task on learning the schematics from Verilog. Schematic of Xilinx ISE I think this is a good approach in learning Verilog, because I actually get to know how...

Introduction to Chip Design 0

Introduction to Chip Design

I am officially in the midst of my internship now, and decided to try something new to me, which is chip design. I was given the tools of Atyls Spartan 6 FPGA development board...

Data2mem and BRAM 0

Data2mem and BRAM

This week I have started working on initializing the block ram (BRAM) with some content. There are so many ways to initialize your memory with. You can for example directly initialize it form your...

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Finalizing and Documenting

This week and the coming one will all be about finalizing, testing and documenting everything. This needs to be done for all t3pi I/O devices. In addition, there is a few bugs in c3rdas...