This week, I learned the importance of creating a program that is stable without relying on information from other files. This is important when it comes to designing a robust algorithm. Initially, I made a program to extract information from generated Verilog file, so that the naming of pins from Read more…
I continued to work on the large microphone only to find it was not working. It was weird as it has same characteristics as the small microphone and the design worked on the small microphone. I tried to change the width of the debouncer and tried a design without debouncer Read more…
I carried on with the task of designing the modules in Verilog. I had chosen to work on the Infrared Transmitter and Infrared Receiver. This was quite exciting as it was my first time to work on two modules that work together. I already started designing the code for the Read more…
This week, I made a documentation about naming convention. I learned the importance of documentation and communication because it ensures a smooth workflow of project and it helps someone in the future to understand the concept quickly and continue working on it. Other than that, I study wishbone and learn Read more…
At the beginning of this week, I realized I had only another month of internship to go which made me feel bad over the fact that I was not done with at least half of the sensors. I was determined to be as fast as I can in finishing them. Read more…
After much reading and some calculations, I learnt that theoretically the ideal bits of the LFSR counter in my design should result in the range of 300 µs to 5 ms debounce time. The width had to be quite large since the FPGA board clock speed was 100 MHz. For Read more…
For this week, I work on instantiating the modules. Each signals’ name need to be the same as object’s name. For example, a signal named ‘ack_i’ should have an output like ‘B1_ack_i’ as ‘B1’ is the object name. This is achieved by using substring in an AUTO_TEMPLATE. Then I make Read more…
Modifying the debouncer design was how this week started and end for me. I used a counter for my previous design but this was not recommended by Dr. Shawn since it takes up a lot of space and the design could be simplified even further just by using a Linear Read more…
Bouncing is the likelihood of metals to come into contact with each other, when the contact is opened or closed, producing unwanted multiple signals. Debouncing is the method of making sure only one desired signal is produced based on a single opening or closing of a contact. I have proceeded Read more…
I work on generating Verilog version of source code based on user input which is coded in C++ this week. I study Verilog-mode and the way of this tool functions to properly instantiate the signals’ name. I make sure the program labels each device respectively to user’s input while doing Read more…