For this third week of my internship I had the opportunity to get my hands dirty with coding by writing up my first program for one of the UIs and then testing it out by connecting to a remote PouchDB Database for Data fetching and Data creation. The PouchDB Database Read more…
During the second week, I worked on my assigned project and also received kind guidance from Dr Shawn whenever I’m stuck. My project involves processing final scores of participants in a competition. This calls for pulling data from a CouchDB database after all the marks by judges are dialed in, Read more…
At the start of the internship, I studied Git more in-depth. I appreciate that it will be a valuable tool later on for my projects, such as providing a means of version control. I was given clear briefing about my projects early on by Dr Shawn. My project involves a Read more…
For my second week of internship I started off by completing the design of the PouchDB Database Schema and finalizing its documentation. With some supervision and minor tweaks, I was able to finish up this task at the start of the week. My internship project for these upcoming several weeks Read more…
My name is Uzair and I am a third year Electrical and Electronics Engineering student. Today marks the 6th official day since I began my internship at Aeste. Coming from an engineering background, I was given study material that took about 6 weeks to complete prior to the commencement of Read more…
I am getting close to finishing my part of the project, and only have a week and a half left for this internship period. This week, I have completed integrating the K3rangka with S3padu from the synthesis to bit generation to bram data replacement, writing a function similar to icebram Read more…
This week’s work was very productive in the way that I was able to complete the design flow from synthesis to bitstream generation (excluding bram content replacement) for all 6 fpga types: Xilinx 7 series, Cyclone V, Cyclone IV, Lattice ECP5, Lattice ICE40, and Spartan 6 (which implements the ISE Read more…
At the end of this week, I was able to speak with my supervisor to discuss my progress, mistakes, and next steps. During this discussion, we talked about the importance of representing a product in an understandable and simple manner in engineering, and I thought this was noteworthy. As this Read more…
This week’s work was focused on writing the code to operate the design flow tools for the Xilinx 7 series, Intel Cyclone V, and Lattice ECP5. I had to gather all the tools I have found during the first few weeks of internship and integrated it into the K3rangka code. Read more…
I have finally begun making changes to the K3rangka code, trying to isolate the implementations of running yosys, nextpnr, and other tools into separate classes. Previously, the implementation was within the resource file that handles the HTTP requests. The implementation handled different type of FPGAs through if statements, which was Read more…