PCB Designer Life

Have you ever been thrown into the middle of ocean, and you don’t even know how to swim? Well, I have lived this experience, both literally and figuratively. This week it was the latter! But let me assure you, it felt exactly the same both times. Therefore, I am writing this blog for anyone who is just starting with designing Printed Circuit Boards (PCBs) for the first time. I will be explaining and detailing how I started, what I have Read more…

Witty and HTTP Client

By approaching this week we can finally say that we have completed the first half of the internship successfully . According to our university internship program , the second half is dedicated for the student to carry out a specific project that is related to the host company, so here we are, in this week we had the opportunity to sit with Dr.Shawn discussing about the project and what should be accomplished next. The project I’ll be doing is related Read more…

Gitlab Error 422

There are so many problems when running Gitlab behind a reverse proxy. However, the Error 422 one is the most common. The only way to fix this problem is by supplying X-Forwarded-Proto and X-Forwarded-Ssl request headers to the reverse proxy as indicated here. How to do that depends on each individual reverse proxy server used and is beyond the scope of this aside.

My last week

I have finally completed my internship here in AESTE. I have learned so much here, not just about programming but also learning skills, discipline and time management. For my last week I have finish the basic documentation of my code. The project I have been working on for three months is finally documented. Documenting the application: There are many kinds of method to document code on the web, but we need to select the correct method of documenting it. In Read more…

Editor Enhancement

In this week , I had to stop working in verilog for a while and get back to do some adjustment and modification to the project web interface. Actually it is really a good thing to break the routine and do something different from time to time :D. If you still do remember, I was handling the code editor part, the editor so far was running on its minimum capability, it can really be enhanced by adding some more features Read more…

Enhancing the Interface

This was relatively a short week, as today is Thursday and Friday is a public holiday. Moreover, yesterday we left the office at noon to have a farewell dinner for one of the interns and we did not return to the office afterwards. Simply put, the objective this week to enhance the user experience while using the application. There were some obvious changes that need to be done, but some were just features that will make the usage of the Read more…

Building Verilog Modules

Time flies by so fast, I can not believe that we almost approach the mid of the internship !! .. By writing this blog entry I can say that I have successfully completed 12 weeks .. 12 weeks that were full of knowledge, stress, hardworking and sometimes …. fun 😀 . This week my task was completion of the past weeks work. I had to start writing the verilog module definitions for different components and devices. These modules will then Read more…

Testing File System

This week I focus my attention on troubleshooting the problem of the application. As I explained in the previous post of the week, there is a few problems in the application and I have found some solution to solve this problems. Decode signal not exposed in Http Client I refereed to the previous project of Dr Shawn and find out that there is a pair of code that can solve this problem. This problem arises when we are trying to Read more…

Application Modifications

The functionality of the Inkscape extensions was almost finished last week. Most of the work I’ve done this week was optimization and modification to different parts of the application. Some of these changes were made to the Witty application (in C++) and some were made to the extensions (in Python). Import extension The first of these changes was applying the new naming convention for naming the pins of the elements. I explained the naming convention we implemented first in my Read more…

ISA Size Comparison

Just to do a quick and dirty comparison of several popular ISAs, I compiled a simple C application that calculates primes using the Sieve of Eratosthenes using the following command: gcc -O2 -c -o prime.o prime.c Then, I compared the output binaries just on memory size using the ELF size command. I used the ARM and THUMB outputs as a benchmark for comparison. $ size prime.arm text data bss dec hex filename 244 0 0 244 f4 prime.arm $ size Read more…