Hello everyone, my name is Ayman and I am doing my Final Year Project under the supervision of Dr. Shawn Tan. In my first blog post I will describe my project, what I have been doing in the past weeks, and what I will do next. The first paragraph is a general description of my FYP, those familiar with the topic can skip it if they want to.

My FYP project is based on a project I want to execute for my self. I was investigating the different classes of computers from servers to embedded systems looking for a room for improvements that I can make. That led me to thinking about advancing the performance of single board computes, such as Raspberry Pi, through utilizing reconfigurable computing to export some of any code written by the user to be hard coded in an FPGA; a step that is expected to enhance the performance considerably. The final goal is somewhat simple to describe,at the end of the day you should have a board where you write a c++ code or a python code, part of this code will run in a processor (most likely a soft core processor) and the rest will be synthesized into a suitable logic circuitry to enhance the performance. A project like this contains several sub-projects each of which can be an FYP on its own; to be able to compete with the raspberry pi this dreamy board should not need a computer to be programmed. That means it needs to run linux, gcc, and other compilers and interpreters all of which should be able to determine which part of the code will can be improve by exporting it to the reconfigurable fiber and which part is more suitable to be run be a conventional processor; then the logic should be efficiently synthesized and an improvement should be noted. Considering the limited time frame, I was advised by Dr. Shawn to only test the main idea and showcase that solutions incorporating reconfigurable logic are promisingly more efficient than pure software solutions. He proposed determining what exactly do I want to export to the reconfigurable logic: computations, memory capabilities, or I/O for example. Then I should focus on a subclass of that part and prove the concept through it. He additionally proposed using Xilinx’s Zynq in order to compare a conventional software solution and my hardware assisted solution on the same platform.

From this point onward, I tried to find a suitable area to focus on. What I aim to improve are computations so I needed a computationally intensive area to test the concept. Based on my understanding of the concepts I was interested in using one of two options: Digital Signal Processor or Video Encoder (HVEC in particular). Both of these choices seem to be acknowledged to be more efficient in hardware to the extent that many FPGA boards include silicon DSP  modules and the recent SOCs for smartphones such as Qualcomm’s Snapdragon 810 include a HVEC chip to speed up the process. After wasting considerable time investigating both options I came to a realization that they lack an important aspect, the visual appeal! Take HVEC for example, I can create a sophisticated software and hardware solution for the problem, and looking at the complexity of the HVEC standard it seems that designing a small CPU will be much simpler, but the only thing I can demonstrate to the examiners will be the notion that hardware solution is faster. Considering the possibility of the examiner not being from a related field it is likely that the impression he will get is not pleasant; even worse, I may not manage to convince him of the improvement. Due to this unfortunate possibility I looked for an alternative that can prove hardware efficiency and will create a difference that is visible even to people from other disciplines. The solution I arrived at was video processing.

The concept is simple. I want to hook up a camera, process its image, and display it on an LCD, or transmit it to the laptop and display it there. The result should be a better frame rate in the hardware solution compared to the software solution and that will be noticeable for anyone, thus granting the wow factor. From this point onward I have various paths to proceed in terms of which particular application I will perform and which platform I will use. I investigated both but I think I need feedback from my Supervisors to proceed. The platform suggested by Dr. Shawn, Zedboard, seems to be the ideal choice due to its use of Zynq which is essentially an FPGA that is interfaced with an ARM processor. Zynq solutions can be developed through Vivado and can even run linux thus providing a very convenient platform for these projects. Initially I aimed to use Zynq so I went through the Zedboard tutorials thorugh Vivado 2014.2 (after an embarrassing problem I faced with 2015.1 that forced me to install Vivado 2014.2) . I still prefer using Zynq but there is a problem of availability and price. even the academic version of  Diligent Zedboard for example is priced at $319 which is over the budget of FYP (RM500 per semester, I assume I can take the budget of both semesters now) and the best factory-lead time I found is 5 weeks. There are other Zynq solutions such as PecoZed and MicroZed but I didn’t manage to to find them in Malaysia, which results in a factory-lead time of 10-12 weeks. I contacted their websites to clarify the estimated time for arrival and the shipping and taxes costs for the overseas providers. Considering the time frame of the project these times might not be feasible so I had to consider an alternative. Edit: After consulting a friend, I found out today that there is actually a feasible Zynq option in terms of time and price. Parallela Development Boards P1601/P1602/P1600 costing prices from RM1000 to RM600. I am now trying to learn about the P1602 which costs RM 600 and can be delivered within 2 working days.

There are two ways to proceed depending on which is preferred: First, If I want both solutions to be on the same board then I can develop my software solution on a softcore processor and use the same board for the hardware solution. After snooping around in the university it seems that I can  use a DE0 nano board which is designed to run softcore processors, if I also use AEMB2 as the processor then that will give me access to gcc and several versions of linux and will cut the cost of these materials to essentially zero. From a speech/lecture about Microprocessor design that Dr. Shawn presented in the Exceptionally Hard and Soft Meeting in December 2012 he mentioned that AEMB was designed to support different platforms and manufacturers. I also found a blog entry in Aeste confirming it has been successfully implemented in an Altera FPGA. Therefore, this solution is theoretically possible, and the materials are all currently available. I still want Dr. Shawn’s appraisal of this approach. The second approach is chosen if the priority is comparing software solutions on hard core processors versus hardware solutions on FPGAs. In this case, Raspberry Pi can be used for the software solution especially since it is the go to choice for many hobbyists. The DE0 nano can still be used for the hardware implementation. I think I can manage to get an RPi for free, but even if that is not the case it can still be ordered with a relatively cheap price and fast arrival time.

For the task that will be executed I am considering a range of applications depending on the capabilities of the platforms. the applications range from simple rotozoom to facial recognition. I am also considering object detection and face detection. Due to my past experience with facial recognition (my DSP project was facial recognition using Local Binary Histograms) I think that the software development for any option will not take more than a week.  The last point that I will write about is the Camera, there are various camera modules available in the market and I believe all proposed solutions do not need a high resolution nor a high frame rate so any option will suffice. I managed to get permission to experiment with the camera my team is using for ISDP which is already available in the university and will cut the cost to zero again. The camera is the logitech C210 which have 1.3 Mega Pixel resolution.

The question I am facing is which direction should I take in terms of: Which platform should I use? which application is suitable for creating a difference between the software and hardware solutions? Based on the feedback from the supervisors I plan to finalize the components selection by the end of this week. I will start developing the software solution first which should take some time and then proceed to the hardware solution

I think I wrote enough for today. Sorry for the long Post and I hope to continue working with you.



Leave a Reply

This site uses Akismet to reduce spam. Learn how your comment data is processed.