Hi everyone, I’ve just started my work as an Intern Engineer in AESTE and today marks the fourth day which I have spent in this company. For the next 15 weeks (if I’m still an intern here), I will fill up this blog with my weekly personal experiences and learning outcomes. I was tasked with learning a great deal of C++, C, HTML Javascript and some computer architecture basics, which I did not finish. My boss was disappointed and so Read more
Time passes quickly and my internship has come to an end. Throughout this journey I have learnt a lot and gained a lot of new insights especially from my supervisor, Dr Shawn. I would like to extend my appreciation to Dr Shawn for all his guidance and advice in this journey. He has taught us how to be a better engineer and also a better person as a whole. I have learnt that a developer or programmer has to achieve their objective Read more
Now that my week 3 has passed, I would say I am not as clueless as before. I have shown my previous week’s work on witty application with backend WResource to Dr Shawn. Subsequently it was followed by a session defining my aims in the project I have been assigned. I am supposed to initially make cloud storage work as the client’s permanent storage, while the two other portions of the project will be incorporating other projects to mine. With Read more
This week, I had been assigned task on learning the schematics from Verilog. Schematic of Xilinx ISE I think this is a good approach in learning Verilog, because I actually get to know how does the Verilog codes affect the circuits. At first, I was merely following the schematics that produced by the Xilinx ISE tools, I really felt that it is almost impossible for a human to draw a full schematic like that. However, after reading previous posts on Read more
First day of work already got scolded by the Boss, “Another two useless Intern!”, “Call Rodney now,” “I’m thinking whether to fired you 2 now, cause i won’t lose anything”, “simple things also cannot do”, “if you don’t understand read more lah, I give you all so much time and you still cannot finish it”, “WHY!!, explain to me WHY!”, and I diam diam only XD, “I give you 1week time to finish everything and follow everything from the senior Read more
Another week has passed in AESTE and although Dr Shawn was not around for the time but there was no lacking in my learning curve. My senior interns (Sumia, KY and Islam) had always tried to pass down the knowledge they have earned throughout. I am more than blessed to have them around to guide me through and allow me to learn through their experience I must admit, it is still quite a lot to absorb all together. I think Read more
FreeRTOS capable to run multiple tasks by using tasks switching method. Scheduler is the kernel who doing the task switching operation. The scheduler will changing the task into running state when it is require. But when the yield, block or suspend functions is called, the scheduler will switching other task in ready condition into the running state. Whereby only one task able in running state at a time. This week I spent the time on doing the context switching function Read more
This week my task focus is to survey about the price of electronic components for a project. This is my first time doing such a survey for a real industrial project. I get to see how a Bill of Material (BOM) is listed. The first thing I learnt is the octopart website. At the first look, the website shows price information from various distributors for the same component. It is like a one-stop website where you can find price from Read more
This week I continue the work on the SSL. After I included all the necessary files, it return errors of ‘TCB_uRam’ cannot fit the section. At first I thought it was running out of RAM space like another case that I experience before. Since the SSL is a very large file, therefore I disable all the unnecessary stack. However, after disabling most of the stack it still return the same error. By referring on the datasheet, it seems that the Read more
I am officially in the midst of my internship now, and decided to try something new to me, which is chip design. I was given the tools of Atyls Spartan 6 FPGA development board for the development of chip design. The Xilinx ISE tool There are many documentations provided by Xilinx, it is just matter of time to finish all of them, or to choose the important ones and focus on them. I found that this ISE in-depth tutorial is Read more