Engineering Elegance

TCB in FreeRTOS

Last week, I found that the value pxCurrentTCB is different from the instruction address of my task created. After discuss with Dr Shawn, he told me that the value of pxCurrentTCB should beĀ different from the instruction address of task created inside elf file. The pxCurrentTCB is holding the stack address of a task. So I found my concept is wrong and pxCurrentTCB is holding the correct stack address. When the task created by calling function xTaskCreate, a TCB will be Read more…

By [email protected], ago

A New Chapter

With minimum expectation and completely blind faith I had arrived at AESTE for the beginning of my internship of 12 weeks. Just to give a background, before I proceed with my blog, I am a Bangladeshi student studying Electrical and Electronic Engineering in Malaysia and I have been here for 3 years now. It was important to mention as it is very rare for people to encounter Bangladeshi, that too a girl, studying Engineering in Malaysia. Getting back to my Read more…

By [email protected], ago

Memory Map of RISC-V Angel

As my colleague started to modify the linker script, I found more problems to be solved in the simulator. The RISC-V Angel Memory One of my concern this week is to set or limit the memory that could be created by the simulator, which is also the size for the RAM of simulator. The default RISC-V Angel RAM is set to 8 MiB (MegaByte), which can be calculated from Total Memory (byte) = 1 x 1024 x 1024 = 10485760 Read more…

By [email protected], ago

Closing Chapter

I still can’t buy the fact that this is my last time to write an official blog as AESTE intern. Yes! If you haven’t figured it out yet… I’m the type of person who hates all the goodbye thing. šŸ™ I do still remember my first blog I wrote, my first days at AESTE and how nervous I was. All these memories seem like just yesterday. Time really went by so fast, almost twenty eight weeks I spent here in Read more…

By [email protected], ago

Finishing Touches and Bugs

Well this week I continued working on the project. Some bugs were solved, some minor modification for the code here and there and some modules and classes were added. The first issue I was working on was regarding the CodeMirror editor interface. The tabs of the editor weren’t in line. Some need a single tab and other needs double tabs to be in the same depth. The solution for this bug was straight-forward. The C++ mode that we use for Read more…

By [email protected], ago

More Components and Bugs

Again, we spent this week fixing bugs and adding more components. We are not adding new features but rather working on the features that are already implemented. Here’s the summary of what happened throughout the week. More components We added more components to the web application. These components are LCD, Mtwi, Mspi. Previously we have had these components (Mtwi and Mspi), however we needed to change their names to Stwi and Sspi (hence, changing them from masters to slaves). So, Read more…

By [email protected], ago

A Road Less Taken

This week I continued to look into tree dump files in the effort to find out the data passed to the plugin event. Honestly as I have posted before, information on analysing dump files are really hard to find online. Most of the information available are about the basic information about dump files but not how to analyse them. After searching for quite some time online, I have found only one resource so farĀ from GCC Resource Centre, IIT Bombay that Read more…

By [email protected], ago

Stack pointer in FreeRTOS

This week I am trying to implement the stack initialization to the system. Other than that, the FreeRTOS required programmer to make functions to save and restore context of the system during tasks switching. Every tasks in FreeRTOS required to save into the stack. The task is assigned to the stack during creating task into the system. Once the task is needed to be run, the stack pointer will restore to the particular stack address. And the minimal task space Read more…

By [email protected], ago

HTTP Methods

My task was to include all the request method to allow users to interface with the web server. Inside the demo code of microchip TCPIP, there was a flow of state machine to receive and response the request. By modifying and inserting the request method, a simple receive request and return response program can be performed. Ā This was tested by using the telnet to send the commands, for example OPTION / HTTP/1.1. After finishing the simple receive and response task, Read more…

By [email protected], ago

Memory Mapped I/O and Port-Mapped I/O

Completion of Timer Interrupt This week, I had been working around with the timer interrupt, confirmed that the timer interrupt mechanism is actually correct after storing and restoring the 32 general registers that had been discussed previously. RISC-V control status register ISA only works around with the registers, but not the immediate value. Thus, I had to save an immediate value to a register before using the control status register ISA such as CSRRW, CSRRS, and etc. Configuring most of Read more…

By [email protected], ago