Chronicles from our peeps.
My journey with C++ continues with three engines up and running. The bitgenerator, the software encoding bitstreams to suit our system. The software loader which runs data2mem to load the elf file into the RAM blocks on the bitstream. Last but nor least the synthesizer which runs Xilinx command line Read more
As mentioned last week, the basic logic for the mechanism was devised within the PIC but it needed to be integrated to store and receive information on where the correct version of the file is saved onto the SD card from the card’s MBR itself. The biggest challenge to this Read more
For a short period of time I’ll be writing a couple of C++ programs to do some tasks in our project. The first of them is what took my time this week and it’s more or less playing around with a bit stream. In this post I’ll explain what are Read more
The test proceed into testing whether the slave modules are able to perform at high speed, without manual inputs. First, I initialize the Python code on the RPi to 25 MHz and I try to verify the functionality of the module. But, before that I found the ADC modules has Read more
Following the functionality of the Base64 decoder and CRC checked writing process, it was time to move onto the next step to reach the objective set for the month. The next step is to integrate two specific portions into the current code; i) the Ping-Pong Upload mechanism and ii) Reading Read more
This week I’ve fully completed I2C master and slave and tested them by simulation. Having been over that I’ve moved to learning C++ object oriented programming to write the code that creates the system top level code. There isn’t much to say about C++ so I’ll use this blog post Read more
This week ended up being highly productive as it culminated into the completed functionality of the file upload system with Base64 decoder and CRC support. However, it was not always plain sailing during the week and much time, effort and attention to detail was needed to debug the existing code. Read more
Finalizing I2C continues. Finally the master is fully functioning but tested only through simulation. Here is the Features of the master: Clock Synchronization and Arbitration. Detection of a busy bus. Supports Arbitration loss. Handles Slave induced waits. Capable of repeated start and back to back reads and writes. Future Improvements: Read more
This week was very interesting and yet tiring one! I wrote my networking c++ program and began to understand how machine interacts with each other. That involved too much researching and reading. and most of the time I ended up closed lines. I spent the first few days on researching Read more
The next thing to do is to initialize the interrupt service routine and also to configure the change on Port B interrupt. By referring to the interrupt that is used by the original demo to calculate the ticks for the blinking LED for the TCP/IP stack, it seems that is Read more