Continue from the previous blogs, this blog focus on debugging the upcoming errors that may be faced on while using the Zedboard. These errors are the bugs from the Xilinx PlanAhead 14.4, 2012 late version, working on Ubuntu 14.4 operating system.

XPSGuiSessionLock Error

Initially, I was following the Zedboard CTT ISE 14.4 tutorial from the official Zedboard website, and I found that the tutorial is not working fine for me. The annoying error of XPS about the XPSGuiSessionLock, actually put a hold on my progress, as the XPS allows the control of the Zynq interface ports, addresses, and etc.

The selection of “Yes” on the error actually close the whole XPS, meanwhile the selection of “No” would result in a hang on the XPS, not performing anything or pop-out of setup the XPS.

guilockerror

After numerous attempts on solving this error, I found that the error actually happens when selecting the Zedboard Zynq Evaluation and Development Kit from the “Board” category during the setup of a new project. To solve this error, you just need to select the same Zynq chip xc7z020clg484-1 from the “Part” category. This should basically solve the error, as now you can select the “Yes” from the error and the XPS should be working fine without closing it.

The Zedboard Tutorial

If you are following the tutorial from the zedboard website, you are most probably going to encounter many other errors, such as XPSGuiSessionLock, ChipScope Pro and etc. I searched over the internet to look for more sources of tutorial on the usage of PlanAhead tool with Zedboard, but mostly they are for Xilinx Vivado. I found that the PlanAhead tutorial link provided by the previous blog actually deprecated, the new link should be here, although its title was for ISE 14.2, it still works perfectly fine for ISE 14.4. This tutorial is actually the best tutorial that I had found, it actually guides through how to create a bare-metal or standalone Zedboard application, and learn about the idea on integrating the Cortex-A9 processor system (PS) with the Programmable Logic (PL).

The tutorial package also contains the UCF file for the Zedboard, which is a compulsory file that need to be included externally, in order to control the port interface of the Zedboard. Also, I found that going through the tutorial to create the configuration for the Zedboard in XPS manually, is way better than configuring the XPS using the Zedboard template, which can also result in some errors during the generation of bitstream.

Besides, during the creation of Board Support Package (BSP), the selection of the supported libraries must be unchecked for all, or else the non of the libraries would be included for the BSP, which could lead to failure in building of the code later. The most common error would be the failure to allocate the header files, xgpio.h : No such file or directory.