A little bit of everything

This was rather a short week because of the Chinese New Year. Nonetheless, this week I was focusing on modifying AUTO_TEMPLATE for all different modules to generate a top level design. To start off, I was studying the CPU32 module taken from one of the projects and created an AUTO_TEMPLATE Read more…

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Sweet Serendipity

I was able to discover the crux of the problem from last week. Previously, we were baffled by the fact that the size of the private key that is generated by the server application appears to much smaller than the private key that was generated by XCA, even though they Read more…

Photo by Charles Deluvio 🇵🇭🇨🇦 on Unsplash

Week Nine

This is my ninth week of being an intern at Aeste Works. This week was testing whether the lwIP stack had been configured correctly and whether the interface can be successfully initialized.  To initialize the network stack in a lwIP single-threaded core, the function lwip_init is called and then the network Read more…

Generating a single Verilog file

I was working on Icarus Verilog and Emacs in this week. First of all, I would like to introduce Icarus Verilog. Icarus Verilog was a compiler which compiled Verilog code into executable programs for simulation and synthesis. The conventional supported targets were vvp for simulation and fpga for synthesis. These Read more…

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The Fault in My Code

So last week, we discovered that client certificates could not successfully be imported in both macOS and Windows operating systems. Testing out with a manually generated certificate using XCA, we were able to confirm that the problem was that the PKCS#12 generated by our application does not contain the full Read more…

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Setup and Testing Week

The Setup Now that I have access to the production server, I had to pull the project’s code from our git repository into the server’s filesystem. Shortly after that, I needed to check if the server application could be built and executed. No major issues in that regard. Everything seemed Read more…