I’ve managed to completely remove the Icache from AEMB. Simulation and FPGA implementation were both a success. However, after the edits AEMB now runs slower because it has to fetch each and every one of it’s instructions through at least two Wishbone cycles. It’s worth mentioning that Before removing the Read more…
Continuing from the last week, the reason that why the connection will be timed out when uploading a larger file is due to the modification I made to calculate the data size uploaded. The method was removed for the mean time and tested the code out. It turns out that Read more…
This is my fifth week at AESTE, undeniably, I have learned a lot and I think that my programming skills is gradually improving as I implement my tasks. I have spent the first 2 days to continue implementing the SHA1 driver as it was unfinished last week. Later, my program Read more…
This week has been the shortest one since I started my internship at Aeste because we were having holidays for the Raya Aidilfitri. During the 3 working days of the week, I worked on the GPIO driver to let two raspberry pi communicate with each other. After some discussions with Read more…
This week was more general as I was mainly trying to optimize all the modules I did so far, cleaning codes and git. From notable things, I managed to cut the number of LUTs in ECDSA module from last week’s 2200 to 1601 while the number of slice registers went Read more…
This week task is to continue testing on all the instruction set schematics that I have implemented in the pipeline. I need to make sure the correct instruction is fetch according the to the program counter and later decode and execute it according the instruction fetched. Thus, I need to Read more…
The previous function of reading a sector is using a 512 bytes buffer, by doing minor modifying on the tightest loop to write into a pointer instead of a buffer. The function can read from sector indefinitely (theoretically) using multi-block read. If a read is less than 512 bytes, it Read more…
My new task is to remove the Icache module from AEMB. Basically Icache holds all instructions before execution by the core. Icache acquires the instructions from whatever is holding them externally and keeps them for processing. Icache controls the Instructions WB interface through the ich_hit signal. When the processor needs Read more…
Continuing from where we left off last week, we make a few last-minute additions to the Spartan-6 schematics and design the footprints of the components in preparation for PCB design. Just a short post this week, but click here to skip to the conclusion. Hardware Schematics With all the pins Read more…
This week, I was given a task to write a driver for the Secure Hash Algorithm 1 (SHA-1), which ultimately produces a 160-bit of hash value. It wasn’t as simple as I thought it would be as it’s quite different from the drivers that I wrote earlier. Apart from understanding Read more…