So it has been 2 weeks since the last time I’ve blogged and a lot have happened since then. Today we just finished the design and testing of the SPI peripheral device. That includes an SPI Master and slave that are wishbone compatible and a dummy master to test those two devices. We have tested the design using simulation and by implementing it on 2 FPGA boards connected together through SPI signals.

Don’t get too excited reading the above statement cause that was the good news. The bad news can all be found in the process of doing the design.

My part was the SPI master which took 2 weeks to finish even though as stressed by my supervisor it should have taken only a day. To my disappointment he is actually right.


My first design didn’t use a FSM. Here is a picture of my schematic. If you are trying to create an SPI device I suggest you to do NOTHING like this picture!

That schematic was deemed useless by my supervisor along with my colleagues design of the slave. Hence came my second design using a FSM and referring to this design

Here is my FSM at some point of the design, major changes has been added to this design though to simplify it.

Here is the schematic for my design. This is not the final one too.

In addition to this I learned about bash script and is now using it to run my simulations. It really makes life easier.

Next task is designing HDMI device !

Categories: Experiential

1 Comment

Week 0011 | AESTE · 2013-06-21 at 17:53

[…] Funny, I’m pretty sure I wouldn’t believe if someone had told me few years ago that the sight of blinking LEDs would make me happy. There is a short video and some more detailed explanation how the thing works on my colleague’s blog here. […]

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