RISC-V instruction set architecture (ISA) is designed to support computer architecture research and education, and completely free for academia and industry use. By using the reference of RISCV-Angel, which is running with the RV64 (64-bit) architecture. My task is to make sure that the RISCV-Angel is able to run on the Read more…
Now for real, the circuit is finished, and I have started with assigning and creating the footprints for the components. There are no one major updates this week, but rather a lot of changes and modifications to the schematics. As usual, here is the visual diff for this week. Additions Read more…
This week I started to integrate everything together starting from the generation of the C++ code by the user up to the creation of the final bit stream. It’s the time to get every part of the project work side by side with each other. Verilog top module and EMACS: Read more…
Good news everyone, the circuit is finished 😀 ! Well, not so fast! Now everything is connected, but there are some last minute modifications to the circuit that were introduced just now. I will work on those first thing next week, and hopefully, I will start with the PCB layout. Read more…
This week is pretty challenging, I was assigned on task of putting a CPU into web application. The first thing to be done is to analyze the code of the CPU, it was written in pure JavaScript. The Best Way to Learn JavaScript I found out that the previous learning Read more…
Progressing from where I stopped last week, this week I had to finish everything up and make sure that everything works as it’s supposed to. Before I go in details and describe what I have done, I have to clear some stuff that were left from last week up regarding Read more…
I continues working on the schematics this week. By now, almost all the major components in the circuit are connected. Last week I connected the Ethernet jack, SD card, and some of the microcontroller connections. This week I did the connections for the USB port power pins, FPGA I/O ports, Read more…
In our PCB, we have an FPGA, and PIC18 microcontroller. It is our intention to share one oscillator between the two ICs, hence reducing the cost, and sparing the PCB precious area. This post will discuss the problems that might occur, and what configuration we are using. Problems can occur Read more…
Witty After experience with Witty features, I found that witty is really a good toolkit to learn how to develop web application, and to have better understanding about web. Most of the details cover from the witty HTTP client, server and etc. had been written by Sumia’s Witty and HTTP Client. Read more…
This week I have started working on initializing the block ram (BRAM) with some content. There are so many ways to initialize your memory with. You can for example directly initialize it form your HDL code. But this way is inefficient and tiresome as you have to keep changing your Read more…