Nearly DONE

This week I managed to finish the basic version of the code. It now establishes a network and then uses CORS protocol to communicate with the client. The client will then be able to erase the FPGA or flash and write a new set of data by entering the correct Read more…

Read Flash

This week I worked on flash programming. Previously I managed to use flash driver to accomplish erase and write operations. However, the library does not include a read functionality. The code was still using NVM library to perform a read operation. I came up with a function to perform a Read more…

Verification of Codes

I was not capable of verifying the codes that I modified because I had problems understanding how the output signal waveform should and should not be. I was frustrated with myself that I could not even understand the simple communication protocol, GPIO. Dr. Shawn was also angry and had to Read more…

Automated Test Bench

Test bench can be deterministic or self-checking. In deterministic test bench, the design’s output are simulated according to the design’s state and inputs specified in the test bench. A designer would then have to validate that the outputs are working as it should. Meanwhile, in self-checking test bench, expected results Read more…

NVM Driver

This week I was working on flash erase, write and read. Previously I used the NVM driver to access the flash. The erase size for flash is fixed to a page, which varies based on the device. The write size, however, can vary between a row, a quad-word and a Read more…

A Month of Internship

This week started off with me panicking when I could not find my saved files and codes. I asked Dr. Shawn about it and he fixed it rightaway so I was able to access everything again. Turns out, it was because of a black out which affected our server. Then, Read more…

Understanding Verilog Codes

Dr. Shawn would always remind me not to be consumed or lost in the programming language while learning Verilog as it describes the schematic in designing chips and must be approached as such. Treating it like a normal programming language will not be the right way to study Verilogs. This Read more…

NVM write

This week I started on integrating the code and finalizing all the functions so that later on I can include them as libraries in my code. I also worked on writing the bit stream on the flash which will be done using a PUT command and also reading it from the Read more…