ASH1 communicates externally with two kinds of components, a master controller (master CPU) and a typical PHY interface unit that couples ASH1 with peripherals. The communication is achieved through the following signals: Interfacing with Signal Width Direction/ Type (with respect to ASH1) Master CPU clk 1 i reset 1 i strb_wb 1 i we_wb 1 i ack_wb 1 o data_i_wb 8 i data_o_wb 8 o addr_wb 8 i int_ack 1 i int0 1 i int1 1 i int2 1 Read more
As I have mentioned in the previous post, this and the coming posts would describe ASH1 architecture and special features. Below is the block diagram of ASH1. It consists of a data stack, a control unit, a program counter, an arithmetic/ logic unit (ALU), a cyclic redundancy checksum (CRC) unit, an input port, two output ports, a wishbone interface unit, a register file, two FIFO buffers, and three flag registers. These components are interconnected among each other via two Read more
One of ASH1 features is that it can perform – what we can call – software-controlled CRC calculation. As we know CRC incorporates bit shifting, xoring and in sometimes inversion. We decided to have a unit in ASH1 that is dedicated to all these operations. For instance, we want to calculate CRC for a data byte prior to its transmission, we would simply push the byte on the stack, signal the CRC unit to start the calculation and then -without Read more
As an open source hardware shop, we have to contend with some serious limitations when it comes to source control tools. However, this person has come up with a way to do visual diffs of circuit schematics and PCBs using existing tools. All the we need to do is to adapt it to our standard processes. Yeay!
It’s always nice to have a meeting at AESTE. It charges you up and gives you the necessary motivation. If you want to get motivated … AESTE should be your destination where you can see ambitious people pursuing their passion.. For the next phase of my work on ash1. It’s planned to work on the following streams in parallel : Documentation : paper work + documenting + coding style. Integration of Ethernet Operations ash1 Assembler Development. regarding future posts, I Read more
Hi again ! As the goal for ash1 is to make it as small and as fast as possible. I’ve tried to investigate the size and speed features of ash1. As we have seen from the previous post, ash1 is pretty small (~500 FPGA slices)… I guess this is super cool if we compare it with a typical MAC Ethernet IP core (~2800 FPGA slices). Moreover, it’s smaller than AEMB processor core (~1500 slices). So in terms of size, the Read more
It has been a while since my last blog … I was busy with my exams and university issues for about a month. So, here we come again to talk about ash1. Since I have started working on ash1, I was anxiously waiting for the day where I can write a piece of code and test it out on an FPGA device and this is what happened ! On 20th of August, 2011, ash1 executed its first program that I Read more
I was being informed that my blog posts were too technical until a point that it bored the readers. I felt pity for my supervisor, because he needs to read through all my dull blog posts before publishing them. The reason that I prefer to blog technical stuff is that it is has less restriction in terms of grammar, and also fewer vocabulary is needed. All in all, engineers are trained to write technical stuff, right? Since I’m now having Read more
Processes can be classified as either I/O-bound or processor-bound. As the name suggests, the former is a process where much of the time is spent in waiting for relatively slow I/O operations to complete. For instance, a process taking input for a word processor will be I/O-bound as it spends most of its time waiting for characters input. Such a process is runnable for only short duration, because it is eventually blocked to wait for more I/O. On the other hand, processor-bound process spends most of the Read more
Continue from my previous post, LLVM: Compiling FreeRTOS with LLVM (Part 1). Anybody who might have some basic skills in programming, creating Makefiles especially, must be laughing hysterically if they come across and read my previous post in this topic. When I google the phrase “Compiling freertos with llvm” or “freertos llvm”, my post comes out first in the results. I wonder how many read that post. Silly me, pity them. I was laughing at myself and feel embarrassed when Read more