Engineering Elegance

Memory Mapped I/O and Port-Mapped I/O

Completion of Timer Interrupt This week, I had been working around with the timer interrupt, confirmed that the timer interrupt mechanism is actually correct after storing and restoring the 32 general registers that had been discussed previously. RISC-V control status register ISA only works around with the registers, but not the immediate value. Thus, I had to save an immediate value to a register before using the control status register ISA such as CSRRW, CSRRS, and etc. Configuring most of Read more

By [email protected], ago

Analysing Dump Files

Data Flow Analysis This week I continued in my search for reference in dump files analysis. In the beginning, I found something about Data Flow Analysis and when I look inside the content, it looks like exactly like Mathematics, probability all over again. There are a lot of symbols and expressions that I have not seen before, probably because I did not learn about data flow analysis before. At first I was quite shocked to see data flow will involve Read more

By [email protected], ago

HTTP Server

This week I continue the work on the TCPIP. There are a many features in the TCPIP microchip allpication library demo, which are unnecessary. I had to remove these unnecessary features. Since many of these features were linked with each others, therefore I need to delete them one by one and compile to test whether there are errors. After removing those unnecessary features, I continue to work on the performance improvement task. There is a built-in TCP buffer used to Read more

By [email protected], ago

Starting FreeRTOS

This week I trying to port another RTOS to our microprocessor. The purpose to learn this OS because it usually run preemptive operation in event scheduler. Same as Contiki, FreeRTOS also a RTOS design for small and memory constraint processor. Currently, FreeRTOS had successfully ported to plenty of microprocessor which consist products of Altera, Atmel, Arm, Cadence Tensilica, Cortus, Infineon and so on. Each of the process in FreeRTOS called task, FreeRTOS using the scheduler to control the tasks state. A task will be Read more

By [email protected], ago

Using JSON and Internal Modules

One issue that I worked on this week was to change the objectList file format. The objectList file contains the list of the object the user has defined. Previously, we used a very simple file structure for the objectList file. Basically, evey component was written in one line and we simply then reads the file line by line. Although it works, it is better to use one of the existing file formats instead of creating our own. The issue was to Read more

By [email protected], ago

Almost there..

This week a new millstone for the project release has been created. So we were working on closing our outstanding issues and completing the rest of the left features. Changing the Object-List File Format: Have you experienced the feeling that usually comes to a little kid who likes playing by his “building blocks” and making his own building structure.. and during one of his design he suddenly decides “out of nowhere” to take one of the block out … and Read more

By [email protected], ago

Timer Interrupt using RISC-V

This week, I worked on the implementation of Timer Interrupt using the RISC-V Angel. The RISC-V Angel had a timer interrupt code for itself for the usage of Linux ELF file. However, it does not state obviously how do they use it and why are they writing their code in such way. Thus, I had to decode the source code from RISC-V Angel and from the source code of RISC-V Linux. Understand about Interrupt Although I had learnt interrupt in Read more

By [email protected], ago

Exploring the Dump Files

This week I continued in my attempt to analyse the dump files produced last week. I happened to read online that the dump files are written in pseudo-C syntax, although pseudocode is supposed to be understood more easily, however it still does not make much sense to me. The dump files content does not seem to provide much that is significant to me. However, one thing that I noticed about the dump files are they all have numbers starting with Read more

By [email protected], ago

Rendering Bug and Session Cookies

For the most part of this week I was exploring new ideas, exploring Wt’s capabilities, debugging some annoying bugs, and designing algorithms for some objectives. First, let me start with the interface bug. Slow connection rendering bug When the interface was changed to the current one, a weird bug occurred on slow connections where the two widgets (the code editor and the schematic editor) overlaps. However, whenever the browser size changes (hence, Wt will calculate new dimensions for the widgets) Read more

By [email protected], ago

Contiki and FreeRTOS

Last week, I am still doing on contiki’s functions testing in my new porting microprocessor and platform. After 1 week plus of function testing, the basic functions are working in my porting microprocessor and platform. The process in contiki OS called protothread. All of those protothread are scheduled in cooperative manner. The current cooperative process need to be finish first before the following scheduled cooperative process can be run. Other than that, contiki os also support preemptive process. It is normally Read more

By [email protected], ago