Engineering Elegance

Boundary Bilinear Interpolation

This week, things are getting clearer, and the work are getting better. I began to realize my previous mistake, that the image processing pipeline core might be driven in different clock speed, compared to the CCD clock speed. The core should be able to drive as close as the CCD clock speed, as this will produce a low power design. The Boundary Bilinear Interpolation As I finished the circuitry of the High-Quality Linear Interpolation, and tested it with Icarus simulator, Read more

By khaiyong@aeste.net, ago

User Authentication with Wt

This week, Dr. Shawn gave me a briefing on my new project. It seems quite a hefty task for me, but I hope I can finish it in time. FYI, I am working on a some sort of online project manager with user identification. The first thing I started working on is using the built-in GoogleService and FacebookService under Wt/Auth Class. Trying out the OAuth Example in Wt In short, the authentication services did not work. After pressing the logo Read more

By jhchong92@aeste.net, ago

And Over the Finish Line

My 12 weeks of internship has finally come to an end. This journey has been bitter sweet with lots of lost hopes and high expectation, with tears and joy and cries of frustration. But beyond all that, I have created something significant. Maybe in comparison it might not be a lot but from where I received my project and the minimum knowledge I had initially, I managed to authenticate Dropbox’s user accounts, upload, download and delete files, store user info Read more

By maisha@aeste.net, ago

Input & Output of Image Processing Pipeline Core

This week, I worked on the schematic of BRAM buffer and demosaic algorithm core. As I going deeper into the design, I found that I had lack of some necessary information, such as how to handle the signal of the demosaic core output later, and how would the demosaic core recognize the input signal. Thus, I went through into searching more and more reference from the internet, and I found the best way that could clear my doubt, which is Read more

By khaiyong@aeste.net, ago

Google Drive and Dropbox storage

This week marks another new chapter for me in Aeste as my task is switched to handling the storage backend of the project. I have officially taken over the project from Maisha, now my ex-colleague, who has done a great job in completing the upload/download part for Dropbox. To familiarize myself with the project, I went through the whole process of from setting up an account and uploading/downloading a file. I will explain in brief what happens here: Registering the Read more

By jhchong92@aeste.net, ago

PIC32 Serial Console and Configuring a FPGA

This is my tenth week in AESTE. Continue fixing some minor bug for my wolfssl TCP server state machine and adding some additional features. ╭∩╮（︶︿︶）╭∩╮ Correcting some misconception For my previous post, I mention about the IP address being different from the one preset in Harmony Configurator, and the solution was to remove some TCPIP stack features to solve the issue. This solution is slightly misleading, because the problem was because ‘DHCP Client’ was enabled, with this feature enabled the Read more

By alexlo@aeste.net, ago

Final Lap

This being my second last week, I had to put in my effort as much as possible in order to reach a state for my part to be able to be passed on. I have been working on optimizing my codes while adding features which would be needed in future, which includes retrieving Metadata of files and folders and then being stored in a JSON file. This will allow the project to keep track of and manage which files are Read more

By maisha@aeste.net, ago

😂😂😂~PIC32 with NVM driver, CORS protocol and HOTP~😛😛😛

This is my ninth week in AESTE. Continue working on PIC32 and Harmony with storing data into internal flash (using NVM) and improving my network transport layer by adding CORS protocol and HOTP. 😀😁😂😃😄😅😆😇😈😉😊😋😌😍😎😏😐😑😒😓😔😕😖😗😛 PIC32 with NVM Driver For storing data into internal flash I plan to use NVM driver, but not DEE Emulation which I used for PIC18. The main reason is because NVM method could store faster and much more data with a single write command. The only Read more

By alexlo@aeste.net, ago

Pipelined Design for Demosaic Core

This week, I worked on the design of the circuitry for the demosaic IP core. On previous week, my supervisor and I has come to a conclusion of the usage on HQLI algorithm, as it is more hardware friendly and the result is satisfying as well. The design of the demosaic core is separated into two major parts, which is the buffer and the calculator. As supervised by my supervisor previously, so that I would not go into the wrong Read more

By khaiyong@aeste.net, ago

Further works on LCD and Improving the Interface

For this week, I continued my work on the  LCD driver. There was much to be done to build it as similar to an actual model but I am making some progress. I will talk about the few enhancements which I have done. Toggling of JointJS wires This is done using the same concept as toggling the Gpio wires which I have done previously. Since the getBits() function I have used for Gpio is generic, I used it for the Read more

By jhchong92@aeste.net, ago