Engineering Elegance

Designing a new PCB Board

This week I finish drawing my PCB design for a new board using Spartan 6 TQFP packaging and PIC32MZ. Also added a bluetooth module (HC-05) onto the new board. In comparison most of the component’s footprint for this new board is exactly the same with the previous board, only this time I decided to make some changes on the capacitors’ footprint.  For Spartan 6 – 144pin only requires 4.7μF and 0.47μF capacitor value. And from ‘table 2-2 of ug393‘ stated that these Read more

By [email protected], ago

Automate Bitstream: Part 3

Continued from last week, I finally manage to automate the bitstream generation. Good news that I have also fixed the problem that causes the hanging of the web application. The hanging is mainly caused by the usage of Wt::WApplication::instance()->deferRendering, because freezes the user interface. The doJavaScript() Problem What surprised me this week was the usage of doJavaScript() in Wt. Apparently, after removing the Wt::WApplication::instance()->deferRendering, it does not work well, unless the widgets are clicked on. As I refer from the documentation, it Read more

By [email protected], ago

Code cleanup and adding features

I have been removing a lot of old JSON stuff which is now replaced with Wt::Dbo. So far, using Wt::Dbo has offered so much of convenience when adding, modifying or querying database objects, as long as you create the Wt::Dbo::Session using your database file. insertWidget at specified positions So I have taken the advice from Dr. Shawn to make some improvements on my project. When adding new files into the application, the newest file should appear at the first position. Read more

By [email protected], ago

Gone with JSON, in with Wt::Dbo

Up till now, I’ve spent months of quality time with Wt and gotten quite familiar with it. It has taken care a lot of dirty things for me in the background and at the same time, taught me a lot more about programming in C++. Compromises The application I’m working on is far from being stable and optimized. There are compromises which was necessary in the mean time. For example, the Facebook oauth authentication which I will probably fix when Read more

By [email protected], ago

Automate Bitstream: Part 2

The task continues with more challenges, where I start to monitor the synthesis flow that had been set previously, starting from the generation of the HDL file to the generation of the bitstream. Apparently, I found that most of the process are messed up, where the synthesis actually takes place before the generation of the HDL file. The data2mem process is executed even before the update of the ELF file. Many of these minor problems accumulated, and is actually a big Read more

By [email protected], ago

Last Few Steps to Complete a PCB board

This week I finish up my schematic for a new board. This new board is similar to the previous PCB board that I design, only that this board uses Spartan6 TQFP packaging.  Most of the component will remain only some minor changes on the capacitor decoupling. To know the required/necessary capacitor for the Spartan6 chip, follow this link in page14 (Spartan-6 FPGA PCB Design and Pin Planning Guide). I also learn how to insert picture (.png) onto the board. The Read more

By [email protected], ago

Extending Wt::Auth

Working on Wt::Auth and Wt::Dbo library for the past few weeks have given me another glimpse into a few of the many functionalities built into Wt. This time it wasn’t as simple as just using the member functions that were provided. The problem with using a library in general is that it won’t fulfill all your requirements. In Wt::Auth::AuthWidget specifically, there is a default login view model which some people would not prefer. So, what’s left to do is to Read more

By [email protected], ago

Automate Bitstream : Part 1

The Xilinx Synthesis and Implementation As I start to work on the synthesis and implementation flow, in order to generate the final bitstream that is being used to be programmed into the FPGA. I found that several links are very useful for studying the flow of synthesis and implementation. Nevertheless, this link also provide further detail on these processes. The implementation process is the one with the UCF file to be incorporated with, where it is a continuation from the Read more

By [email protected], ago

FPGA and PIC comms

This week started with a mess. I started to confuse about what is my task all about, until my supervisor clarified me about it. Add a SPI module As I mentioned on my previous post, my task is to assign the SPI module into the FPGA, to form the communication bridge between the FPGA and the PIC. There are many ways to achieve this, and I had made many guesses before the implementation. The simplest and easiest way that I had Read more

By [email protected], ago

Preparing BOM file

This week I finish up my Schematic and preparing the Bill Of Material (BOM) file for my PCB design. I also study some Bluetooth module to be implemented onto my board. The most common bluetooth modules are ‘HC series’ (HC-05 and HC-06), with ’05’ able to be configured as Master or Slave while ’06’ is fixed. After spending some time studying these bluetooth modules, I learnt that there are many unused pins. Generally only 6pins (3.3, GND, TX, RX, KEY, Read more

By [email protected], ago