Engineering Elegance

User Session with Wt::Dbo

Hello everyone, I have agreed to work part-time for Dr. Shawn, together with Alex and Peter. My work will include completing the front end of the previous project which I had contributed on during my last internship.   The first task I will try to accomplish is creating a user session, which will handle the transactions between the user and server. Example of transactions would include registering the user and saving/updating the user projects and boards. For the purpose, Wt::Dbo library would be used Read more

By [email protected], ago

Project Continuation

After idling from Aeste for a month, I am back to Aeste again. The task now is to continue working on the previous intern project. Since I am working remotely, I have to setup my working environment to be exactly the same in the office. I chose to setup a virtual machine for it, for easier setup purpose. The setup of virtual machine does take some time, and surprisingly after all the installations, it could push and pull from the git Read more

By [email protected], ago

Déjà vu

So…….it seems I am back in Aeste 😅😅😅 My task is to continue the part that was done halfway (PCB board). I started the week by first double check my schematic design then match with the PCB design to find any flaw/weird connection. And of course the first week of work (Déjà vu) I was given a piece of one’s mind for connecting several FPGA’s pin to analog side of the board. As a matter of fact FPGA (Spartan 6) Read more

By [email protected], ago

Something End

This is my last week in AESTE. It all started with Something New and comes to a close with Something End Week1: Something New – Got scolded magnificently by my supervisor Week2: Network Programming – Working hard not to get scold Week3: CORS and HOTP – Still get scold for not doing well Week4: Crypto stuff – I guess I know what I am doing now? Week5: Internal Flash – Ya Ya, Adding more stuff to project again Week6: Wt: Read more

By [email protected], ago

Finishing touches

My internship in Aeste has come to an end. It has been quite a unique experience. I started the internship with some rough scolding and was nearly fired on my first day because I did not finish the pre-internship studying materials. Luckily, I stayed on for another 16 weeks. In my last week, I did documentation on the codes which I have written. Looking back, I have really learned a lot of things and I can certainly say I have Read more

By [email protected], ago

More restructuring and coding smarter

This week, we Aeste interns had much fun where our boss brought us for movie on Wednesday and a farewell lunch for Peter (bye Peter!) on Friday. As for me, this would be the second last blog post. Using Boost::property_tree Back on topic… I mentioned last week that I was using boost::regex to modify(edit values, delete nodes) json files. It was brain-damage inducing and very dumb. Luckily, Dr. Shawn read my blog and told me about this. Turns out that Read more

By [email protected], ago

Clocking FPGA and LAN8720 with PIC32MZ

This is my fifteen week in AESTE finishing up my PCB design project. ..-“””””-.. .’ ___ ‘. / .”\ `\ \ ; /, ( | ; ; /_ ‘._ / ; | |- ‘._`) | ; ‘-;-‘ \ ; ; “””” / MY \\ ; \ ‘2 Cents’ / ‘._A E S T E_.’ “”—–“” I learn a lot this week not just merely about PCB design but also some life principles, because my supervisor is around this whole week Read more

By [email protected], ago

The Final Week in AESTE

This week, the work goes to some optimization of the demosaic core, and some analysis to be done. The Removal of RAM Previously, I had mentioned in my previous blog that, to use RAM to delay the signal, when it is extremely large cycle to be delayed with. My supervisor pointed me out about the problem. RAM is an expensive component to be used. It is always better not to use it if not necessary. The usage of RAM to Read more

By [email protected], ago

Demosaic: Software vs Hardware

This week, the real comparison starts, to identify how much faster the demosaic core is, compared to software implementation. Software Implementation of Demosaic Previously, I had finished the software implementation of demosaicing for various demosaic algorithm, and tested them in Darktable software. The darktable software is very convenient because it allows to zoom in to pixel and able to view the difference or to debug the algorithm. Initially, I directly ported the C code that had been written to the Read more

By [email protected], ago

PCB design is NOT easy!

This is my fourteen week in AESTE with Schematic done proceeding to PCB design about 50% done. The PCB design is a Four-layer board, signal -ground – power – signal. I am pretty thankful and grateful to be able to do PCB design, the main reason is because to me, I initially reckon PCB design is the easiest job/task, and since during my studies I already done a decent amount of PCB drawing so I was pretty confident I will Read more

By [email protected], ago