Final Touches

With Monday and Wednesday being public holidays, one could say that this was a pretty short week. Continuing with the tasks from last week, I had most of the work done on Tuesday and Thursday, setting up new pages, enhancing already implemented features, such as the “date picker” and “auto suggest” through the use of JQuery. That leaves me with one more page which I need to set up, along with the bug fixes. I will also have to thoroughly Read more

Second Meeting

Started off this week trying to finish off my work from the previous one, whereas I was making some progress, it wasn’t fast enough and I couldn’t see myself being capable of finishing things off before the deadline, that being, the client meeting. I had managed to set up the search functionality eventually while at home through the use of a CakePHP plugin, but once I had checked in the morning, I saw that Dr. Shawn had already implemented it Read more

PCB Fiducial Markings

This week I tried solving the problem I was facing with putting the FPGA in configuration mode, which I have also explained in my blog last week. The main issue is that after TCPIP_STACK from Harmony Configurator is initialised, pin D0 will not be configurable anymore. I have tried reading the peripheral selection register for pin D0 (RPD0R), it reads 0000. According to the data sheet, 0000 corresponds to  “No Connect”, which means the pin is used as a normal Read more

Second Day of Internship at Aeste

I finished going through all the tutorials of Git. It was very useful for understanding Git, how it works and the methods of using it were clearly demonstrated. Besides that, Dr. Shawn taught me on law today while relating it to the project that I will be assigned on. Among it were on intellectual properties (IP), patents, copyrights and trademarks. In conclusion, it is crucial to ensure that our work are made right and permitted by law.

First Day of Internship at Aeste

I was not at peace and was scared to start my internship here as I did not finish my work to study all the pre-internship materials that was given to me by Dr. Shawn. Dr. Shawn was very furious to know but I was fortunate that he is still giving me the chance to cover up everything by this week. However, I have to manage my time efficiently as I also had new tasks given on Git. Git is an Read more

Week 6

Continuing with the list of issues from the previous week, my progress eventually came to a halt, things such as the implementation of an audit log, which is used to record any changes made within a database table, such as deletion or modification, are hindering my progress. Even though there is a CakePHP plugin which is specifically made for that purpose, I am still facing trouble installing and getting the plugin up and running. With such a really slow progress Read more

FLASH & FPGA

This week I finished up the flash function to erase, write & read and also added the FPGA erase and write functions. The main body of the code is done, it can now receive a command through HTTPS connection and it will execute the corresponding functions based on the sequence of the input commands. FPGA Configuration Mode I faced an unusual problem, when I tried to put the FPGA in configuration mode INIT_B would not follow PROGRAM_B and it refuses Read more

Client Requests

This week didn’t start off well, mainly due to the incomplete tasks from last week, which are proving to be pretty troublesome at this point. The biggest issue was due to the meeting with the client being on Monday, and thus presenting them with a project which isn’t functioning properly wasn’t something to look forward to. I would have liked joining in the meeting if that was possible, being a software engineering student. Later on during the week I received Read more

NVM Controller

This week Dr. Shawn pointed out that we do not need to use a boot loader since we just need to erase the flash and write the new data. I looked at NVM (Non-Volatile Memory) controller as an alternative. The NVM library in MPLAB X gives you the ability to read, erase and write to the flash memory. The read, write and erase functions require the starting address and also the number of blocks that are affected. However, the size Read more

Boot-Loader

This week the second part of my task, that is to be able to erase the FPGA or PIC32 flash when needed and program them accordingly. Erasing the FPGA means putting it in configuration mode so that in can receive a configuration bitstream. This is achieved by pulling PROGRAM_B pin low and then set it high again while waiting for INIT_B pin to follow. Once the FPGA is in configuration mode, the bitstream can then be transferred until the done pin Read more