Automate Bitstream : Part 1

The Xilinx Synthesis and Implementation As I start to work on the synthesis and implementation flow, in order to generate the final bitstream that is being used to be programmed into the FPGA. I found that several links are very useful for studying the flow of synthesis and implementation. Nevertheless, Read more

FPGA and PIC comms

This week started with a mess. I started to confuse about what is my task all about, until my supervisor clarified me about it. Add a SPI module As I mentioned on my previous post, my task is to assign the SPI module into the FPGA, to form the communication bridge Read more

Preparing BOM file

This week I finish up my Schematic and preparing the Bill Of Material (BOM) file for my PCB design. I also study some Bluetooth module to be implemented onto my board. The most common bluetooth modules are ‘HC series’ (HC-05 and HC-06), with ’05’ able to be configured as Master Read more

Revamping the User Registration & Login

Yay, Oauth feature is working! So previously, I complained that the oauth feature in Wt was not working.  It turns out the error was in the redirection endpoint. However, only GoogleService seems to be successful in identifying the user credentials where FacebookService gave a JSON Exception error.  This is probably Read more

User Session with Wt::Dbo

Hello everyone, I have agreed to work part-time for Dr. Shawn, together with Alex and Peter. My work will include completing the front end of the previous project which I had contributed on during my last internship.   The first task I will try to accomplish is creating a user session, Read more

Project Continuation

After idling from Aeste for a month, I am back to Aeste again. The task now is to continue working on the previous intern project. Since I am working remotely, I have to setup my working environment to be exactly the same in the office. I chose to setup a Read more

Déjà vu

So…….it seems I am back in Aeste 😅😅😅 My task is to continue the part that was done halfway (PCB board). I started the week by first double check my schematic design then match with the PCB design to find any flaw/weird connection. And of course the first week of Read more

Something End

This is my last week in AESTE. It all started with Something New and comes to a close with Something End Week1: Something New – Got scolded magnificently by my supervisor Week2: Network Programming – Working hard not to get scold Week3: CORS and HOTP – Still get scold for Read more

Finishing touches

My internship in Aeste has come to an end. It has been quite a unique experience. I started the internship with some rough scolding and was nearly fired on my first day because I did not finish the pre-internship studying materials. Luckily, I stayed on for another 16 weeks. In Read more