Chronicles from our peeps.
This week I worked on flash programming. Previously I managed to use flash driver to accomplish erase and write operations. However, the library does not include a read functionality. The code was still using NVM library to perform a read operation. I came up with a function to perform a Read more…
I was not capable of verifying the codes that I modified because I had problems understanding how the output signal waveform should and should not be. I was frustrated with myself that I could not even understand the simple communication protocol, GPIO. Dr. Shawn was also angry and had to Read more…
Test bench can be deterministic or self-checking. In deterministic test bench, the design’s output are simulated according to the design’s state and inputs specified in the test bench. A designer would then have to validate that the outputs are working as it should. Meanwhile, in self-checking test bench, expected results Read more…
This week, after a lot of struggle with transmitting and receiving the bitstream, I finally managed to successfully transmit the bitstream using curl and receive it on the PIC32 and write it to the flash. HTTP 1.1 transmits long messages in 2 parts, headers, and the body. After receiving the Read more…
This week I was working on flash erase, write and read. Previously I used the NVM driver to access the flash. The erase size for flash is fixed to a page, which varies based on the device. The write size, however, can vary between a row, a quad-word and a Read more…
This week started off with me panicking when I could not find my saved files and codes. I asked Dr. Shawn about it and he fixed it rightaway so I was able to access everything again. Turns out, it was because of a black out which affected our server. Then, Read more…
Dr. Shawn would always remind me not to be consumed or lost in the programming language while learning Verilog as it describes the schematic in designing chips and must be approached as such. Treating it like a normal programming language will not be the right way to study Verilogs. This Read more…
This week I started on integrating the code and finalizing all the functions so that later on I can include them as libraries in my code. I also worked on writing the bit stream on the flash which will be done using a PUT command and also reading it from the Read more…
This week I finished the HOTP function which uses MD5 hashing to generate a 6 digit code. The secret key used for the HOTP is generated in a separate function, using the MPLAB X built in TRNG (true random number generator) library. As for the configuration bitstream, it will be Read more…
This week I continued to study further on the topic of Wishbone signals and also communication protocols. I tried creating testbenches for available codes that had been designed to observe the waveform output but failed to compile it because there were errors. Dr. Shawn pointed out that it was due Read more…