FLASH & FPGA

This week I finished up the flash function to erase, write & read and also added the FPGA erase and write functions. The main body of the code is done, it can now receive a command through HTTPS connection and it will execute the corresponding functions based on the sequence Read more…

NVM Controller

This week Dr. Shawn pointed out that we do not need to use a boot loader since we just need to erase the flash and write the new data. I looked at NVM (Non-Volatile Memory) controller as an alternative. The NVM library in MPLAB X gives you the ability to Read more…

Boot-Loader

This week the second part of my task, that is to be able to erase the FPGA or PIC32 flash when needed and program them accordingly. Erasing the FPGA means putting it in configuration mode so that in can receive a configuration bitstream. This is achieved by pulling PROGRAM_B pin Read more…

HTTPS requests

This week I managed to finish the wolfssl_tcpip code. In the new code, the whole process is carried out in 1 function. In this function, 2 sockets are opened for the 2 possible type of connections; HTTP & HTTPS (with or without SSL). The program then just waits and checks Read more…

WolfSSL Code

This week I got the wolfssl_tcpip code from Micro-chip running. This code establishes a HTTP server which can then be accessed. My task was to strip away all the extra codes in order to simplify the program. The code is base on Microchip’s code and uses some of the included Read more…

New task

I started the week by generating the BOM and also all the Gerber files needed for manufacturing of the board. Something I learned was if there are any fill areas in the design, it has to be filled before generating the Gerber files. The Gerber files are generated based on Read more…

BOM & Routing

Routing the board was finished last week. However, the ethernet connection looked really messy and not optimized, Ethernet connections were where I started this PCB design with. Therefore, I rotated the chip and reconnected it again, this time with a lot more care. The connection is now much better. BOM Read more…

Differential Routing in KiCAD

This week I was mostly double checking all the connections and also all the footprints. There were a few footprints that needed to be modified and rerouted. The I/O ports connected to the FPGA were also rerouted, this time using the differential tracks instead of single ones. That opens up Read more…

Routing DONE

Finally, I managed to finish the routing of the board. After changing the width of the board and having to move the digital ports to fit the new board dimensions, I had to redo most of the connections. Routing the board for the second time was much faster as I Read more…