I started off this week by troubleshooting and testing the flash functions. In harmony there are two non-volatile memory drivers, NVM and Flash. Usage of the flash driver is simpler compared to NVM. The functions allow you to write a word, quad word, or a defined row size. Though you must handle bit-shifting when writing large data. You’ll find how the functions work in this documentation.
After I’ve verified its functionality I attempted to test it by writing a dummy key for the HMAC algorithm to a specific flash address and then reading it back. Due to my inexperience I didn’t get it working right away. I overlooked how memory works with pointers. The key string would be read but it would have other garbage leading to an incorrect MD5 digest. After I get this working, I will be testing the RNG key implementation as explained in last weeks’ post.
I haven’t gotten SSL to work, and I don’t think I will during my internship. I can get it working without FreeRTOS no problem. But on FreeRTOS it gets stuck negotiating encryption. I’ve tried rewriting the state machine more than a dozen times, but to no avail. Dr. Shawn informed me that it isn’t a priority and to forget about it for now.
One more bug I had to troubleshoot was receiving the bitstream to be written to the flash (Double Delete > Put). When receiving it for the FPGA only (Single Delete > Put), I used the DONE pin status as the end condition for the loop. Why? Because using SocketReadIsReady(); or SocketRead(); wasn’t very useful, per se. The first one returns the number of bytes available to be read, and the second one returns the number of bytes actually read. Due to network latency and program execution speed both functions are bound to return 0 bytes before the the bitstream is fully sent, ending the loop early. Adding a delay between checks allows it to work, but it becomes excruciatingly slow to receive the bitstream. Therefore I decided to stick with checking for the done pin. However, when we are receiving the bitstream to write to the Flash only (Double Delete > Put), checking the FPGA’s done pin isn’t option that makes any sense. Performance and speed are very important to Dr. Shawn. Therefore now, the (Double Delete > Put) will receive and write to both the FPGA and the Flash while checking for the done pin.
And we’re going to a buffet dinner next week… How could I have any negative thoughts about this internship when Dr. Shawn keeps stuffing us with food 😀