Closing Chapter

I still can’t buy the fact that this is my last time to write an official blog as AESTE intern. Yes! If you haven’t figured it out yet… I’m the type of person who hates all the goodbye thing. šŸ™ I do still remember my first blog I wrote, my Read more…

Finishing Touches and Bugs

Well this week I continued working on the project. Some bugs were solved, some minor modification for the code here and there and some modules and classes were added. The first issue I was working on was regarding the CodeMirror editor interface. The tabs of the editor weren’t in line. Read more…

More Components and Bugs

Again, we spent this week fixing bugs and adding more components. We are not adding new features but rather working on the features that are already implemented. Here’s the summary of what happened throughout the week. More components We added more components to the web application. These components are LCD, Read more…

A Road Less Taken

This week I continued to look into tree dump files in the effort to find out the data passed to the plugin event. Honestly as I have posted before, information on analysing dump files are really hard to find online. Most of the information available are about the basic information Read more…

Stack pointer in FreeRTOS

This week I am trying to implement the stack initialization to the system. Other than that, the FreeRTOS required programmer to make functions to save and restore context of the system during tasks switching. Every tasks in FreeRTOS required to save into the stack. The task is assigned to the Read more…

HTTP Methods

My task was to include all the request method to allow users to interface with the web server. Inside the demo code of microchip TCPIP, there was a flow of state machine to receive and response the request. By modifying and inserting the request method, a simple receive request and Read more…

Memory Mapped I/O and Port-Mapped I/O

Completion of Timer Interrupt This week, I had been working around with the timer interrupt, confirmed that the timer interrupt mechanism is actually correct after storing and restoring the 32 general registers that had been discussed previously. RISC-V control status register ISA only works around with the registers, but not Read more…

Analysing Dump Files

Data Flow Analysis This week I continued in my search for reference in dump files analysis. In the beginning, I found something about Data Flow Analysis and when I look inside the content, it looks like exactly like Mathematics, probability all over again. There are a lot of symbols and Read more…

HTTP Server

This week I continue the work on the TCPIP. There are a many features in the TCPIP microchip allpication library demo, which are unnecessary. I had to remove these unnecessary features. Since many of these features were linked with each others, therefore I need to delete them one by one Read more…

Starting FreeRTOS

This week I trying to portĀ another RTOSĀ to our microprocessor. The purpose to learn this OS because it usually runĀ preemptive operation in event scheduler. Same as Contiki, FreeRTOS also a RTOS design for small and memory constraint processor.Ā Currently, FreeRTOS had successfully ported to plenty of microprocessor which consist products of Altera, Read more…