Wishbone Bus Interface

In the past week I managed to instantiate the modules based on the user declared objects. Each C++ declared object is corresponding to an instance module in verilog (you can refer to my previous blog entry for more information ). My task for this week was to connect and wire Read more…

Getting it Right

I did not get into OAuth like what I was planning to do last week. Instead I was tweaking the application and the back end of the whole application. I started with the GUI application of the revoke page. Previously, I tried to do some Auto complete function on the Read more…

Creating Parts Library

The objective this week was to create the parts (components) library for the schematic editor. The way we have been implementing it until now is very primitive where we need to hard code all the components details. Although it worked very well for a few number of components, yet it Read more…