THe progress of learning Witty this week is very slow, i merely scratch the surface of the entire Witty framework. What i did in this week was mainly exploring the widget in Witty and the concept of http request and response. I did not go through every single widget in Read more
One of our project requirements is to have a basic online schematic editor for electrical circuits. Therefore, it was my task this week to explore JointJS as the library that we will be using in order to build our editor. However, it needs to be built from inside a Witty Read more
Witty is a very large library that consist of different specific function a good web application will need. In this week I tested some of the function and try to create very simple function, like an application form of sorts. The structure of code in Witty is very different from Read more
This first week of internship in AESTE has been a unique experience as I am already being prepared to do some real application. Firstly , learning Wt does comes with its own perks and also downsides. It is a relatively new web toolkit with its stable release only last year Read more
By today, I have finished my first week at AESTE Works (M) Sdn Bhd. My name is Islam Abdalla and I’ve finished my third year in Universiti Teknologi PETRONAS, studying electrical and electronic engineering. Before starting here, I didn’t know exactly what to expect. The interview were somewhat technical, and Read more
The journey of the 8 months internship has just begun in this week. The first day I had a warm welcoming and introduction of the project that I am assigned to. This moment was really priceless, because I really had been waiting for it for a long time. The Read more
The ultimate future goal is to create a generic Automated Test Bench that can be used with any of our IO cores. Of course the test vectors testing each core has to be different. However, since all our cores use wishbone bus this simplifies creating a generic solution. In this Read more
This post is a documentation of the final version of automated test benches created to verify our IO cores. The test benches have been created for the our GPIO, Master SPI, Slave SPI, UART & I2C master and slave. The test benches verify only the behavior of those devices within Read more
I’ve implemented a list of tests for each device to test it’s behavior within specifications. Those tests are specific for each device. The set of tests is repeated for each possible value of the tested device parameters and each run with new parameter values has it’s expected output saved in Read more