Creating the Verilog Top Module
This week the developing of the project headed toward new direction. Previously I was working mainly in the web development and Witty , starting from integrating the Codemirror with witty to extracting the user objects IDs (Check out my previous blog entries for more information ). This week the task was quite different in term of the language used š . My task was simply to create the verilog top level module from the C++ code . The top level Read more…