Chronicles from our peeps.
This week the board finally arrived and immediately I noticed that the ethernet jack was missing after notifying Dr. Shawn I then started testing the board with an led blink test program and verified the PIC and LEDs are working. I then moved to testing the USB with a simple Read more
This week I started with having both SPI master and SPI slave verified for its functionality. Besides checking for the results of waveform graph manually, I also made sure it passed the automated test bench. This applies for all four modes of SPI which differs from the aspect of clock Read more
This week I managed to finish the basic version of the code. It now establishes a network and then uses CORS protocol to communicate with the client. The client will then be able to erase the FPGA or flash and write a new set of data by entering the correct Read more
This week I worked on flash programming. Previously I managed to use flash driver to accomplish erase and write operations. However, the library does not include a read functionality. The code was still using NVM library to perform a read operation. I came up with a function to perform a Read more
I was not capable of verifying the codes that I modified because I had problems understanding how the output signal waveform should and should not be. I was frustrated with myself that I could not even understand the simple communication protocol, GPIO. Dr. Shawn was also angry and had to Read more
Test bench can be deterministic or self-checking. In deterministic test bench, the design’s output are simulated according to the design’s state and inputs specified in the test bench. A designer would then have to validate that the outputs are working as it should. Meanwhile, in self-checking test bench, expected results Read more
This week, after a lot of struggle with transmitting and receiving the bitstream, I finally managed to successfully transmit the bitstream using curl and receive it on the PIC32 and write it to the flash. HTTP 1.1 transmits long messages in 2 parts, headers, and the body. After receiving the Read more
This week I was working on flash erase, write and read. Previously I used the NVM driver to access the flash. The erase size for flash is fixed to a page, which varies based on the device. The write size, however, can vary between a row, a quad-word and a Read more
This week started off with me panicking when I could not find my saved files and codes. I asked Dr. Shawn about it and he fixed it rightaway so I was able to access everything again. Turns out, it was because of a black out which affected our server. Then, Read more
Dr. Shawn would always remind me not to be consumed or lost in the programming language while learning Verilog as it describes the schematic in designing chips and must be approached as such. Treating it like a normal programming language will not be the right way to study Verilogs. This Read more