My task of this week is the configuration of FPGA. I had to configure the Spartan 6 XC6SLX9 FPGA in the slave serial mode, by using the USART port in the PIC18F97J60. This is something really new to me and web references are scare. Therefore, the only way is to refer the Xilinx documentation to figure the method of doing it.
At the beginning, for me the documentation is difficult to understand and I spent lots of time on reading it. However, I was able to get a general picture of the process flow. Firstly, I have to send instruction to the FPGA according to the specific configuration mode and transmit the bitstream. During the loading of bitstream, internal operation occurs inside the FPGA, such as CRC and ID checking. When all the bitstream successfully loaded the FPGA will release signal to indicate the end of process. Lastly, the FPGA programming mode was ended and shift to the startup event.
Apart from that, I also wrote a code of SPI communication. The code was finished last week but for testing purposes, Dr. Shawn assigned me to rewrite the code according to the spi flash of the Spartan 3 board. Since both of them are similar in term of process, the testing shall able to identify whether the code performs correctly. After reading the documentation, I modified some necessary part of the code and double checked whether there are possible errors might occur. Hopefully every things will run successfully in the next week.
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