Week 2 Day 1: So, the project decided. Its porting LLVM compiler into AEMB. Time to get the code. Should get svn version or release version? First, lets try the svn version. The error said: svn: Malformed XML: not well-formed (invalid token) Eh? What now? This must not be the only problem on this earth. Google it, found this. Week 2 Day 2: Spent the whole day try to hand-tweak each time the problem occurred. Still stuck. Week 2 Day Read more
Hello and good day, As part of task as an intern at Aeste, I was asked by my supervisor to regularly write blog about the task and the experience here. So, this is it. Ahmad Shaiful Amiruddin bin Taher, born in Marang, Terengganu. Final year student, BE(Hons) candidate from Faculty of Engineering, Multimedia University Cyberjaya Campus. Graduation expected, 2012. Insha Allah. Well, how did I end up here at a start-up company when every colleagues of mine all chasing those Read more
Here I am, on the third day of my internship at AESTE, typing away my thoughts and recollections from the past half-week. In the background, the whirring of the air-conditioning and fan accompanies Jason Mraz and James Morrison as they prescribe that everything will be fine (if it’s broken code then fix it)… I arrived at AESTE on Wednesday feeling anxious (read: a little scared) because I was clear of my abilities. I wasn’t gonna try to fool anyone into Read more
During my first week in my company, I was very excited and eager to choose my very own project. However I am very new to the work that I am going to do. I have only very basic experience in C programming, minimal knowledge in assembly language and almost zero Verilog/VHDL. I doubt my ability to program something from scratch. Luckily I am allowed to modify an existing open source code. I am interested in working on making an instruction Read more
This post presents the sixth and the last phase of porting FreeRTOS for AEMB processor. In the previous post, both interrupt and interrupt handling were implemented to serve the mechanism of the preemptive kernel. Although, things seemed fine and set, yet the kernel failed to work when FreeRTOS tasks were created. This problem by far was one of the most complex problems that I faced during my progress in the project. It was hard to tell what was going wrong!! Read more
This post represents the fifth phase of porting FreeRTOS for AEMB processor. The main concern of this phase is to get the FreeRTOS configured to demonstrate the Preemptive Multitasking. By far this phase deals with the following: Setting up the timer to generate the RTOS Tick Handling the RTOS Tick In the previous post, cooperative multitasking was intoduced and successfully demonstrated. However in cooperative multitasking, the interrupt and the interrupt handling had not yet been implemented. As a result, there Read more
I’m a final year student from Multimedia University (MMU), currently pursuing Bachelor of Engineering (Honours) in Electronics. As for my first post in AESTE’s blog, I’m sharing my experiences on job application to AESTE, and the work progress thus far. The job application to AESTE involved two stages. The first stage is answering screening questions in Google Doc, which covered areas in Processor Architecture, Software Programming, FPGA/ASIC Design, Computer Networking and Web Development. Following this was the phone interview by my supervisor, Read more
In the previous post, I wrote about creating a simple FreeRTOS task. However, to demonstrate the FreeRTOS cooperative kernel, more than one task is needed. Basically when starting the FreeRTOS scheduler, an Idle task is automatically created which is an infinite loop so when the kernel starts running, it will never return back the control to the main program. In cooperative multitasking, it is the responsibility of the currently running task to give up the processor resources to allow other Read more
Continuing the series of the posts about my work in porting FreeRTOS for AEMB processor, this represents the third phase of the project which is running a simple FreeRTOS task. In my previous post I mentioned about a problem that I faced during simulating FreeRTOS by using Icarus Verilog. While it has been decided to move on to the next phase of the project with either one of the memory management implementations heap1 or heap2, the problem of the unaligned Read more
Icarus Verilog is a popular open-source digital circuit simulator distributed as part of gEDA. While it is a fast simulator, it runs largely single-threaded and does not exploit the modern developments in computing. Depending on the complexity of the circuit involved, a single simulation run can be fairly time consuming. At AESTE, we are using our cluster of workstations to perform parallel simulation runs. While a single simulation run is still time-consuming and it cannot distributed, we can perform N Read more