Microkernel Considerations

I have been thinking about implementing some sort of OS on the AEMB. At the moment, the OMRP people have had some success with running a uCLinux OS on the AEMB. However, using uClinux may be a bit excessive for simple projects. Therefore, I have thought of implementing some form Read more…

Compiler Futures

At present, all software is compiled using a custom GCC compiler backed by binutils and newlib. However, as the AEMB processor is sufficiently different from the original architecture, it may be time to start porting a new compiler to it. At the moment, the regular GCC compiler is used (with Read more…

Single Precision Aid

While this may not be implemented in the EDK63 version of the AEMB, it is an idea that has been on my mind for quite a while. Software floating-point emulation is expensive in terms of time while hardware FPU is expensive in terms of resources. So, a hybrid method might Read more…

EDK63 Virtual Peripherals

As mentioned earlier, the idea of virtual peripherals is quite tempting on the AEMB core. The two independent hardware threads can be used to implement a single threaded application along with a second thread performing maintenance functions such as interrupt handling. It is therefore possible to implement some hardware peripherals Read more…

EDK63 Mode Activation

There are several methods that can be employed to enable/disable special operating modes of the AEMB. The most obvious method would be to set/clear special bits within the MSR register using the standard instructions. However, there is another method of doing it that may be employed. Firstly, it is possible Read more…

EDK63 Thread Independence

The EDK62 core introduced multi-threaded capabilities to the AEMB2 in the form of fine-grained multi-threading using a barrel processor. Essentially, it interleaves and alternates the instructions for the two threads on each clock cycle. However, the two threads are inter-locked, which means that one blocking thread will block the other Read more…

EDK63 Cache Memory Block

Resource efficiency is always a goal of the AEMB2 design. In order to further reduce resource consumption and improve operating speed, some minor changes are being made in the next generation EDK63 core architecture. The first block to experience some changes is the cache memory block. Looking at the numbers Read more…

EDK63 Design Considerations

Work has started on a the new AEMB2 core processor. This processor is targeted to be EDK6.3 compatible. However, there are a few major changes planned for the release of the E63 core. There is a great amount of both hardware and software work involved. Therefore, this release will take Read more…