Ideas for innovation and creation.
The purpose of a checksum is to determine whether a message was transmitted error free. There are many ways to determine a checksum and one of the ways to do this is to use a cryptographic hash. A cryptographic hash function has several useful properties to do this: A single Read more…
While there are many arguments about the value and valuation of Bitcoin, the crypto-currency, there is overall consensus on the importance of the block-chain, which is the technology that underpins all crypto-currencies in this world. The block-chain, as a distributed ledger, is extremely useful as a storage mechanism to replace Read more…
This is part of our series of ideation entries. What if one could have a modular server farm – think of a rack of blades, which you can add computing resources to in a modular manner. For one, it would definitely reduce power consumption if the computing resources could be Read more…
An idea about hardware assisted synchronisation for the AEMB came about recently. The idea centered on the problem of how multiple threads would communicated between each other. The solution to this problem has always been synchronisation primitives. The AEMB already supports the atomic MSRSET/MSRCLR instructions, which can be used as Read more…
While everyone seems to be quite focused on high-end virtualisation, there is also room for virtualisation solutions at the low-end. One way of approaching this problem is by the use of a thin layer of virtualisation at the nano-kernel level. Instead of just abstracting hardware away, it is also possible Read more…
Since the recent LLVM 2.7 release came with initial support for the Microblaze, it is now conceivable to add some features into the LLVM to enable power optimisation for the AEMB and other architectures. The reason that LLVM is chosen instead of GCC is purely subjective – a cleaner code Read more…
In order to streamline the new AEMB processor family, a new multi-threading model is being tested. In the new multi-threading model, each core will have at least the capability of running four threads either manually or automatically. For the AEMB1, the threads would need to be switched explicitly using special Read more…
The AEMB is designed with an FPGA target technology implementation. Since this is the case, it may be prudent to exploit certain FPGA capabilities that are not present on ASIC technologies. One such capability is the ability of an FPGA to pre-load the contents of block memories from an FPGA Read more…
Since increased concurrency seems like the way to go for computing, I am interested in increasing the concurrency of the AEMB from 2 to 4 hardware threads. This can be done through a dual-core set up. However, I plan to make my dual-core AEMB special by sharing resources between them Read more…
While thinking about the idea of using a micro-kernel, the idea of introducing a special 'kernel mode' came about. However, unlike other processors, this kernel mode does not expose any special instructions. The idea is to switch the instruction execution from external code to internal code. When the processor first Read more…