Experiential
Chronicles from our peeps.
πππ~PIC32 with NVM driver, CORS protocol and HOTP~πππ
This is my ninth week in AESTE. Continue working on PIC32 and Harmony with storing data into internal flash (using NVM) and improving my network transport layer by adding CORS protocol and HOTP. 😀😁😂😃😄😅😆😇😈😉😊😋😌😍😎😏😐😑😒😓😔😕😖😗😛 PIC32 with NVM Driver For storing data into internal flash I plan to use NVM driver, Read more
Pipelined Design for Demosaic Core
This week, I worked on the design of the circuitry for the demosaic IP core. On previous week, my supervisor and I has come to a conclusion of the usage on HQLI algorithm, as it is more hardware friendly and the result is satisfying as well. The design of the Read more
Further works on LCD and Improving the Interface
For this week, I continued my work on theΒ LCD driver. There was much to be done to build it as similar to an actual model but I am making some progress. I will talk about the few enhancements which I have done. Toggling of JointJS wires This is done Read more
LCD in JointJS
Goodbye to another great week, with the highlight of watching The Walk with our boss. I thought the movie was great and inspiring, until I googled about Phillipe Petit (and the things he did). So.. my recent work is all about the LCD which I talked slightly about last week. Read more
β¬βββ¬β‘οΎ(Β° -Β°οΎ) Harmony with wolfssl tcp server and self sign certificate
This is my eighth week in AESTE. Continue working on PIC32 with DM320004, however this time rather than focusing on MLA code, I shifted to use Microchip Harmony source code on PIC32. β(-_-)ββ(-_-)ββ(-_β )ββ(-_-)ββ(-_-)β β(-_-)ββ(-_β )ββ(-_-)ββ(-_-)ββ(-_-)ββ(-_β )ββ(-_-)ββ(-_-)ββ(-_-)ββ(-_β )ββ(-_-)ββ(-_-)β The advantage of using Harmony is that most of the driver, third Read more
Correction on Design and Method
Propagation Delay This week, my supervisor had some discussion with me. The first problems was my timing circuits. Previously, I actually made the timing signals by altering the clock edge, controlling the flip flop using the logic circuits into the clock input. However, this is a serious problem to the Read more
Almost a UI
Now, I must admit, time is really flying by; as they say in tales, almost in the blink of an eye. I am left with two more weeks and a lot more worth of work.Β Dr Shawn has been around the whole week and I believe, during this time, I had Read more
Bringing Life to the Simulation
Time really flies working in Aeste, every day brings a new learning experience for me. You can say life is never dull in Aeste, because Dr. Shawn is going to bring us for movie again this coming Thursday, yay! Moving to my work, as I have hinted last week, I Read more
Synthesis of Verilog
This week, I continued to work on the timing signal generation for CCD sensor. It is also my first time to actually write a real Verilog code that describes the circuit I drew. Initially, I started to rely on Icarus Verilog Simulator, which turns out that the output waveform is Read more