I am officially in the midst of my internship now, and decided to try something new to me, which is chip design. I was given the tools of Atyls Spartan 6 FPGA development board for the development of chip design. The Xilinx ISE tool There are many documentations provided by Read more…
As my colleague started to modify the linker script, I found more problems to be solved in the simulator. The RISC-V Angel Memory One of my concern this week is to set or limit the memory that could be created by the simulator, which is also the size for the Read more…
Completion of Timer Interrupt This week, I had been working around with the timer interrupt, confirmed that the timer interrupt mechanism is actually correct after storing and restoring the 32 general registers that had been discussed previously. RISC-V control status register ISA only works around with the registers, but not Read more…
This week, I worked on the implementation of Timer Interrupt using the RISC-V Angel. The RISC-V Angel had a timer interrupt code for itself for the usage of Linux ELF file. However, it does not state obviously how do they use it and why are they writing their code in Read more…
This week, I finally get the RISC-V Angel Simulator to run the C/C++ code compiled from the default RISC-V GNU compiler, which is specifically designed to compile files into ELF file that to be used with the RISC-V Spike and Proxy Kernel. I had verified that the bootloader extracted from Read more…
This week, I had really a hard time with RISC-V Angel. It started with finding the bootloader code from the RISC-V Proxy Kernel, as the bootloader is the primary program/codes that needs to be load up before the main program actually runs. I searched all over the proxy kernel code and Read more…
This week, I focused with the structuring of my previous coding. As being told by my supervisor, the way I programmed was not well planned yet. The main problem that causes these, is the bad habit of hard coding. I tend to hard-coded many things that I am uncertain with. And Read more…
Continued from last week progress, I started to port the previous debugger code and simulator code into the simulator without the web worker. For the moment, I still unable to find any drawbacks of not using a web worker. Luckily, there is no major modification on the debugger code, which Read more…
A Standalone Simulator This week, one of my task is to determine whether the simulator can be implemented as a standalone simulator, and also able to be called by any HTML/witty application to use it. As suggested by my supervisor, there is an example of widget set in the witty Read more…
Debugger After trying on the break point implementation last week, I decided to work on interface with Sumia and Islam’s code. As pre-discussed with my supervisor, the simulator should be the back-end engine and should not have any visible interface in the Web Application. In order to ensure things going Read more…