This week although wasn’t that productive but I still manage to start working a little on the following new stages that are the 4th stage-Memory Access and the final stage-WriteBack. The first 2 day of the week I continue on code checking before further implement the following stages. Carry bit Read more…
During my 10th week at Aeste, I continued my unfinished business from the 9th week: bit banging the gpio to implement a custom 8 bits wide bus. I spent most of my time this week debugging the gpio driver for the custom bus. My code was ready at the beginning Read more…
My last week surprisingly didn’t involve any more hardware and I had opportunity to play again with some good old C. The task for this week was to write the missing software part for the ECDSA, that is the whole algorithm for signature generation and verification (keeping in mind that Read more…
With the footprints done, wrestling with PCB design continues as usual with component placement and routing. Also this week, I hit a minor snag with regards to simple yet confusing aspect of my task. Blow-by-blow account below, but click here to leap to the summary. Layout & Design Rules As Read more…