This week I worked on flash programming. Previously I managed to use flash driver to accomplish erase and write operations. However, the library does not include a read functionality. The code was still using NVM library to perform a read operation. I came up with a function to perform a flash read without the NVM library. It basically reads the physical address on the memory and saves it to a variable. The code can now receive data over an HTTPS Read more
Test bench can be deterministic or self-checking. In deterministic test bench, the design’s output are simulated according to the design’s state and inputs specified in the test bench. A designer would then have to validate that the outputs are working as it should. Meanwhile, in self-checking test bench, expected results are generated thus allowing the simulator to verify whether the actual outputs are tally to the expected outputs. This means that the designer does not have to go through the Read more
This week, after a lot of struggle with transmitting and receiving the bitstream, I finally managed to successfully transmit the bitstream using curl and receive it on the PIC32 and write it to the flash. HTTP 1.1 transmits long messages in 2 parts, headers, and the body. After receiving the headers a “100-Continue” header should be transmitted in order to receive the body of the message. However, in HTTP 1.0 “Expected: 100-Continue” is not needed, which means the whole message Read more
This week I was working on flash erase, write and read. Previously I used the NVM driver to access the flash. The erase size for flash is fixed to a page, which varies based on the device. The write size, however, can vary between a row, a quad-word and a word, these information are available in the data sheet. [Reference] In the NVM library, the size of write operation is set to row by default. It is possible to change the size by Read more
This week started off with me panicking when I could not find my saved files and codes. I asked Dr. Shawn about it and he fixed it rightaway so I was able to access everything again. Turns out, it was because of a black out which affected our server. Then, I continued practicing the drawing of schematic diagram from reading the Verilog codes. Dr. Shawn helped me in explaining certain part of the codes which I did not understand. It Read more
Dr. Shawn would always remind me not to be consumed or lost in the programming language while learning Verilog as it describes the schematic in designing chips and must be approached as such. Treating it like a normal programming language will not be the right way to study Verilogs. This week, I had the valuable opportunity of learning step by step lessons from Dr. Shawn. Firstly, I was exposed on how to read the codes and bringing out the external Read more
This week I started on integrating the code and finalizing all the functions so that later on I can include them as libraries in my code. I also worked on writing the bit stream on the flash which will be done using a PUT command and also reading it from the flash which is done using a HEAD command in CORS protocol. The RNG and HMAC and HOTP functions are all completed. I have also listed some of the error and Read more
This week I finished the HOTP function which uses MD5 hashing to generate a 6 digit code. The secret key used for the HOTP is generated in a separate function, using the MPLAB X built in TRNG (true random number generator) library. As for the configuration bitstream, it will be received and directly sent to both the FPGA and the flash. I was also working on hid_keyboard provided by Microchip, the objective is for the PIC32 to act as a Read more
This week I continued to study further on the topic of Wishbone signals and also communication protocols. I tried creating testbenches for available codes that had been designed to observe the waveform output but failed to compile it because there were errors. Dr. Shawn pointed out that it was due to my lack of understanding on the communication protocols thus I was not able to make the codes correctly or verifying the resultant waveform. Therefore, I had to study the Read more
It was about time that I finally dealt with all of the bugs (took me long enough) and it’s a good thing that I did, considering how silly and simple the solution for most of them was. I got the feeling that a bunch of them will emerge though once the entire project gets deployed for the client to use, which is on Tuesday, but that’s for the upcoming week, along with all the updates and changes which will need Read more