Learning Week

One week has passed since I started my career in AESTE. The only thing I can do was learning. There are so many things I need to learn before I can start my task. The list below is what I have learned in last week. Git + Github Git is Read more…

New software environment

In AESTE, every task is done in Linux. I am not a Linux user before and to get my job run smoothly, I need to learn it as soon as possible. It is very different to work under Linux platform compared to Microsoft Windows, especially in the ways to install Read more…

First Week in Aeste

I am a fresh graduate with Bachelor of Electronics Engineering from Multimedia University Cyberjaya. I found my passion in electronics hardware and programming when I was in secondary school. During that period, my teacher taught me to write a simple program – sending data from PC, and receiving it with Read more…

CRC Operations: A follow-up

Cyclic Redundancy Checksums generation and checking were among the challenging things in implementing ASH1. Looking for the accurate way to calculate/check CRCs took me a lot of time as it was confusing in terms of the following: Bit Orientations (LSB first or MSB first). The Initial Value of the CRC Read more…

Ethernet Operations: Random Generator

Back-off is an important feature of the Ethernet MAC protocol. After a collision is detected through the MII/RMII interface, ASH1 should stop transmitting (there are more specific details about when exactly to stop transmission) and then reschedule its retransmission by generating a period of time to wait before retransmission. The Read more…

ASH1: Input and Output Ports

ASH1 has 2 output ports and 1 input port whose specifications are like the following: Input Port 0 (iport0) An 8-bit input port with 4 schemes of encoding (table 1): Encoding Scheme Description 00 Non-Return-to-Zero-Level  (NRZL) 01 Non-Return-to-Zero-Inverted (NRZI) 10 Differential Encoding with Non-Return-to-Zero-Inverted (NRZI) 11 (same as 00) – Read more…

ASH1 : Life Cycle

ASH1 is growing and the design is being modified continuously to allow for further flexibility and capability in performing I/O operations. However, these modifications won’t be drastic. ASH1 core is there ! So in the future, there will be slight changes in the instruction set or components. The design flow Read more…