Chronicles from our peeps.
The journey of the 8 months internship has just begun in this week. The first day I had a warm welcoming and introduction of the project that I am assigned to. This moment was really priceless, because I really had been waiting for it for a long time. The Read more
Considering the issues with color detection method in the previous section method used for the image processing section of the project, the Image segmentation method was tested out. Considering that the tracking part of the system once the object is identified, the focus was given on understanding, implementing and testing Read more
Almost all of the week was spent trying to read the SPI bus on the Quadcopter remote control to try to understand as well as decipher the communication protocols and the reading addresses for the Quadcopter. There were some useful reading from the Quadcopter remote which are discussed in detail Read more
It has been a long time since my last blog post. My progress has been slow over the past 4 months but the important thing is that I’m back in Malaysia and have gotten back to work on the project at hand. Since my last post, a lot of aspects Read more
I always wondered how some Certificate Authorities (CA) got their certificates installed in browsers directly, without the user having to import it manually. It took a bit of extra google-fu. So, I thought it pertinent to note things down here. The key to doing it seems to be to use Read more
Part of our project requires the use of regular expressions, which are now a part of the C++11 standard. However, getting things working was not completely straight-forward. All our development machines are running Ubuntu 14.04 LTS and we are using CLANG as our default compiler. Every C++11 regular expression example Read more
This post is a documentation of the final version of automated test benches created to verify our IO cores. The test benches have been created for the our GPIO, Master SPI, Slave SPI, UART & I2C master and slave. The test benches verify only the behavior of those devices within Read more
I’ve implemented a list of tests for each device to test it’s behavior within specifications. Those tests are specific for each device. The set of tests is repeated for each possible value of the tested device parameters and each run with new parameter values has it’s expected output saved in Read more
The ultimate future goal is to create a generic Automated Test Bench that can be used with any of our IO cores. Of course the test vectors testing each core has to be different. However, since all our cores use wishbone bus this simplifies creating a generic solution. In this Read more
In the past month I’ve been experimenting with various approaches to create Automated Test Benches to my Verilog IO cores that are using Wishbone bus. The Automated part simply means that the test bench will verify the correctness of the received outputs and display a Pass or Fail message. This Read more